1. Errata Summary
The table below lists all known errata for the EFR32MG21 and all unresolved errata of the EFR32MG21.
Table 1.1. Errata Overview
Designator Title/Problem Workaround
Exists
Exists on Revision:
A B C
CUR_E301 AVDD/IOVDD to DVDD Leakage Current Yes X — —
CUR_E304 Higher Than Expected EM2/EM3 Current No — — X
GPIO_E301 GPIO_PORTA_MODEL_MODE2 Write Affects SWDIO Pin
During Active Debug
Yes X — —
GPIO_E302 Increased Leakage Current When EM4WU Pins Are Ena-
bled and the Pin State Is High
Yes X X X
HFXO_E301 HFXO DISONDEMAND and FORCEEN Can Cause Device
to Hang
Yes X X X
I2C_E301 New Transfer Ignored if Bus Idle Timeout Occurs Between
Start Detection and the Falling Edge of SCL
Yes X — —
I2C_E302 Follower Holds SCL Low After Losing Arbitration Yes X — —
I2C_E303 I2C Fails to Indicate New Incoming Data Yes X X X
IADC_E301 Delta Sigma Modulator is Disabled in KEEPWARM Mode Yes X — —
IADC_E302 EM23ABORTERROR Interrupt Does Not Work No X — —
IADC_E303 Input Change Missed After Adjacent GND Conversions No X — —
IADC_E304 Possible Data Loss in EM2/EM3 Yes X X X
IADC_E306 Changing Gain During a Scan Sequence Causes an Errone-
ous IADC Result
Yes X X X
IADC_E307 Immediate Conversion When Enabling IADC Configured for
PRS Trigger
Yes X X X
LFXO_E301 LFXO Minimum Load Capacitance Yes — — X
RADIO_E301 Improper TX and RX Operation at High Temperature Yes X X X
RADIO_E308 Low Output Power for 20 dBm Power Amplifier at High Tem-
perature
No — — X
TIMER_E301 Continuous Overflow and Underflow Interrupts in Quadra-
ture Counting Mode
Yes X X X
USART_E301 Possible Data Transmission on Wrong Edge in Synchronous
Mode
Yes X X X
USART_E302 Additional SCLK Pulses Can Be Generated in USART Syn-
chronous Mode
Yes X X X
USART_E303 USART DMA Transactions Fail with Slow Peripheral Clocks Yes X — —
USART_E304 PRS Transmit Unavailable in Synchronous Secondary Mode No X X X
WDOG_E301 Clear Command is Lost Upon EM2 Entry Yes X X X
EFR32MG21 Errata
Errata Summary
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