1
FN8114.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005-2006, 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X40030, X40031, X40034, X40035
Triple Voltage Monitor with Integrated
CPU Supervisor
The X40030, X40031, X40034, X40035 combine power-on
reset control, watchdog timer, supply voltage supervision,
second and third voltage supervision, and manual reset, in one
package. This combination lowers system cost, reduces board
space requirements, and increases reliability.
Applying voltage to V
CC
activates the power-on reset circuit,
which holds RESET/RESET
active for a period of time. This
allows the power supply and system oscillator to stabilize
before the processor can execute code.
Low VCC detection circuitry protects the user’s system from
low voltage conditions, resetting the system when VCC falls
below the minimum VTRIP1 point. RESET/RESET
is active
until VCC returns to proper operating level and stabilizes. A
second and third voltage monitor circuit tracks the unregulated
supply to provide a power fail warning or monitors different
power supply voltage. Three common low voltage
combinations are available, however, Intersil’s unique circuits
allows the threshold for either voltage monitor to be
reprogrammed to meet specific system level requirements or to
fine-tune the threshold for applications requiring higher
precision.
Features
• Triple voltage detection and reset assertion
- Standard reset threshold settings; see Table 1 on
page 5.
- Adjust low voltage reset threshold voltages using
special programming sequence
- Reset signal valid to V
CC
= 1V
- Monitor three separate voltages
• Fault detection register
• Selectable power-on reset time-out (0.05s, 0.2s, 0.4s,
0.8s)
• Selectable watchdog timer interval (25ms, 200ms, 1.4s or
off)
• Debounced manual reset input
• Low power CMOS
- 25µA typical standby current, watchdog on
- 6µA typical standby current, watchdog off
• 400kHz 2-wire interface
• 2.7V to 5.5V power supply operation
• Available in 14 Ld SOIC and 14 Ld TSSOP packages
• Monitor voltages: 5V to 0.9V
• Independent core voltage monitor
• Pb-free available (RoHS compliant)
Applications
• Communication equipment
- Routers, hubs, switches
- Disk arrays, network storage
• Industrial systems
- Process control
- Intelligent instrumentation
• Computer systems
- Computers
- Network servers
Data Sheet August 25, 2008
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FN8114.2
August 25, 2008
Block Diagram
V3FAIL
V2FAIL
WDO
MR
LOWLINE
RESET
RESET
X40030/34
X40031/35
V3 MONITOR
LOGIC
V2 MONITOR
LOGIC
FAULT DETECTION
REGISTER
STATUS
REGISTER
DATA
REGISTER
COMMAND
DECODE TEST
AND CONTROL
LOGIC
POWER-ON,
MANUAL RESET
LOW VOLTAGE
RESET
GENERATION
V
CC
MONITOR
LOGIC
V3MON
V2MON
SDA
WP
SCL
V
CC
(V1MON)
WATCHDOG
AND
RESET LOGIC
+
-
V
TRIP3
+
-
V
TRIP2
+
-
V
TRIP1
V
CC
OR
V2MON*
X40030, X40031, X40034, X40035