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Table of Contents

Enabling Your Successful Design Deployments in 800G/1.6T ..................................................................... 1

Introduction ................................................................................................................................................... 4

Specifications for Pattern Generator Module M8042A and Remote Heads M8058A and M8059A ............. 5

Data output (Data Out 1, Data Out 2) ........................................................................................................... 6

De-emphasis ....................................................................................................................................... 10

Control input A/B (Ctrl In A, Ctrl In B) ................................................................................................. 12

Control output A/B (CTRL Out A, CTRL Out B) .................................................................................. 12

LINK 1/2 (Link1, Link 2) ....................................................................................................................... 13

Channel clock input 1/2 (Ch Clk In 1/2) .............................................................................................. 13

Synchronization input (Sync In) .......................................................................................................... 14

Local bus input/output (LB In, LB Out) ................................................................................................ 14

Pattern and Sequencing .............................................................................................................................. 14

Specifications for Clock Module with Jitter Modulation M8009A ................................................................ 15

Internal synthesizer and clock modes for M8009A ..................................................................................... 16

Channel clock output 1 (Ch Clk Out 1) ................................................................................................... 17

Channel clock output 2 (Ch Clk Out 2) ................................................................................................... 18

Reference clock input (Ref Clk In) .......................................................................................................... 19

Reference clock output (Ref Clk Out) ..................................................................................................... 19

Reference clock output 16G (Ref Clk Out 16G)...................................................................................... 20

Clock output 16G (Clk Out 16G) ............................................................................................................. 20

System trigger input A/B (Sys Trg In A, Sys Trg In B) ............................................................................ 21

Synchronization input (Sync In) .............................................................................................................. 21

Synchronization output A/B/C (Sync Out A, Sync Out B, Sync Out C) .................................................. 21

Jitter Specifications ..................................................................................................................................... 22

Low-frequency jitter ............................................................................................................................. 22

High-frequency jitter ................................................................................................................................ 23

External Level Interference Sources ........................................................................................................... 26

Emulation of ISI (Inter Symbol Interference) ............................................................................................... 29

ISI Channel Boards ..................................................................................................................................... 29

Error Analysis .............................................................................................................................................. 29

Measurements ........................................................................................................................................ 30

Specifications for Error Analysis of Signals above 58 GBd based on Infiniium UXR Series Oscilloscopes

.................................................................................................................................................................... 31

User Interface and Remote Control ........................................................................................................ 34

M8070B system software for the M8000 Series of BER measurement solutions .................................. 35

M8070ADVB advanced measurement package ..................................................................................... 36