eGaN® FET DATASHEET
EPC2308
EPC POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2022 | | 1
EPC2308
CYYWWE 123456
EPC2308 – Enhancement Mode Power Transistor
V
DS
, 150 V
R
DS(on)
, 6 m max
Applications
• High density DC-DC from 80–100 V
• AC/DC
• Synchronous rectication from 28–54 V
for chargers, adaptors, and power supplies
• Solar optimizers and microinverters
• Motor drive and DC-DC for battery-
operated power tools and robots
• USB fast chargers
Benets
• Higher Eciency – Lower conduction and
switching losses, zero reverse recovery
losses
• Ultra Small Footprint – Higher power
density
• Thermally enhanced QFN package with
exposed top and ultra-low thermal
resistances for cooler operations
• Wettable anks and 0.6 mm between
high voltage and low voltage pads to
simplify assembly and inspection
EFFICIENT POWER CONVERSION
HAL
EPC2308
Package size: 3 x 5 mm
G
D
S
Gallium Nitride’s exceptionally high electron mobility and low temperature coecient allows very low R
DS(on)
,
while its lateral device structure and majority carrier diode provide exceptionally low Q
G
and zero Q
RR
. The end
result is a device that can handle tasks where very high switching frequency, and low on-time are benecial as
well as those where on-state losses dominate.
Application Notes:
• Easy-to-use and reliable gate, Gate Drive ON = 5 V typical,
OFF = 0 V (negative voltage not needed)
• Top of FET is electrically connected to source
Questions:
Static Characteristics (T
J
= 25°C unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
BV
DSS
Drain-to-Source Voltage V
GS
= 0 V, I
D
= [TBD] 150 V
I
DSS
Drain-Source Leakage V
GS
= 0 V, V
DS
= 120 V 0.003
mA
I
GSS
Gate-to-Source Forward Leakage V
GS
= 5 V 0.015
Gate-to-Source Forward Leakage
#
V
GS
= 5 V, T
J
= 125°C 0.2
Gate-to-Source Reverse Leakage V
GS
= -4 V 0.015
V
GS(TH)
Gate Threshold Voltage V
DS
= V
GS
, I
D
= 5 mA 0.7 1.2 2.5 V
R
DS(on)
Drain-Source On Resistance V
GS
= 5 V, I
D
= 15 A 4.6 6 mΩ
V
SD
Source-Drain Forward Voltage
#
I
S
= 0.5 A, V
GS
= 0 V 1.5 V
Maximum Ratings
PARAMETER VALUE UNIT
V
DS
Drain-to-Source Voltage (Continuous) 150
V
Drain-to-Source Voltage (up to 10,000 5 ms pulses at 150°C) 180
I
D
Continuous (T
A
= 25°C) 48
A
Pulsed (25°C, T
PULSE
= 300 µs) 157
V
GS
Gate-to-Source Voltage 6
V
Gate-to-Source Voltage -4
T
J
Operating Temperature -40 to 150
°C
T
STG
Storage Temperature -40 to 150
# Dened by design. Not subject to production test.
PRELIMINARY
Thermal Characteristics
PARAMETER TYP UNIT
R
θJC
Thermal Resistance, Junction-to-Case (Case TOP)
0.5
°C/W
R
θJB
Thermal Resistance, Junction-to-Board (Case BOTTOM)
2.8
R
θJA_JEDEC
Thermal Resistance, Junction-to-Ambient (using JEDEC 51-2 PCB)
54
R
θJA_EVB
Thermal Resistance, Junction-to-Ambient (EPC90143 EVB)
23
Scan QR code or click link below for more
information including reliability reports,
device models, demo boards!
https://bit.ly/EPC2308
eGaN® FET DATASHEET
EPC2308
EPC POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2022 | | 2
140
120
100
80
60
40
20
0
0 1 2 3 4 5 6
I
D
– Drain Current (A)
Figure 1: Typical Output Characteristics at 25°C
V
DS
– Drain-to-Source Voltage (V)
V
GS
= 5 V
V
GS
= 4 V
V
GS
= 3 V
V
GS
= 2 V
R
DS(on)
– Drain-to-Source Resistance (mΩ)
V
GS
– Gate-to-Source Voltage (V)
3.0 3.5 2.0 2.5 4.0 4.5 5.0
Figure 3: Typical R
DS(on)
vs. V
GS
for Various Drain Currents
I
D
= 7.5 A
I
D
= 15.0 A
I
D
= 22.5 A
I
D
= 30.0 A
25
20
15
10
5
0
1.00.5 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Figure 2: Typical Transfer Characteristics
25˚C
125˚C
V
DS
= 3 V
I
D
– Drain Current (A)
V
GS
– Gate-to-Source Voltage (V)
1.00.5 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
25˚C
125˚C
V
DS
= 6 V
140
120
100
80
60
40
20
0
3.0
3.5
2.0
2.5 4.0 4.5 5.0
Figure 4: Typical R
DS(on)
vs. V
GS
for Various Temperatures
25˚C
125˚C
I
D
= 15 A
R
DS(on)
– Drain-to-Source Resistance (mΩ)
V
GS
– Gate-to-Source Voltage (V)
25
20
15
10
5
0
Dynamic Characteristics
#
(T
J
= 25°C unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
C
ISS
Input Capacitance
V
DS
= 75 V, V
GS
= 0 V
1454 2103
pF
C
RSS
Reverse Transfer Capacitance 2.6
C
OSS
Output Capacitance 405 592
C
OSS(ER)
Eective Output Capacitance, Energy Related (Note 1)
V
DS
= 0 to 75 V, V
GS
= 0 V
498
C
OSS(TR)
Eective Output Capacitance, Time Related (Note 2) 664
R
G
Gate Resistance 0.4 Ω
Q
G
Total Gate Charge V
DS
= 75 V, V
GS
= 5 V, I
D
= 15 A 10.6 13.8
nC
Q
GS
Gate-to-Source Charge
V
DS
= 75 V, I
D
= 15 A
3.8
Q
GD
Gate-to-Drain Charge 1.3
Q
G(TH)
Gate Charge at Threshold 2.4
Q
OSS
Output Charge V
DS
= 75 V, V
GS
= 0 V 50 61
Q
RR
Source-Drain Recovery Charge 0
All measurements were done with substrate connected to source.
# Dened by design. Not subject to production test.
Note 1: C
OSS(ER)
is a xed capacitance that gives the same stored energy as C
OSS
while V
DS
is rising from 0 to 50% BV
DSS
.
Note 2: C
OSS(TR)
is a xed capacitance that gives the same charging time as C
OSS
while V
DS
is rising from 0 to 50% BV
DSS
.