eGaN® FET DATASHEET
EPC2218
EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2022 | | 1
EPC2218 eGaN® FETs are supplied only in
passivated die form with solder bars.
Applications
• DC-DC Converters
• BLDC Motor Drives
• Sync Rectication for
AC/DC and DC-DC
• Point of Load Converters
• USB-C
• Lidar
• Class D Audio
• LED Lighting
• E-Mobility
Benets
• Ultra High Eciency
• No Reverse Recovery
• Ultra Low Q
G
• Small Footprint
EFFICIENT POWER CONVERSION
G
D
S
HAL
EPC2218 – Enhancement Mode Power Transistor
V
DS
, 100 V
R
DS(on)
, 3.2 mΩ max
I
D
, 60 A
Maximum Ratings
PARAMETER VALUE UNIT
V
DS
Drain-to-Source Voltage (Continuous) 100
V
Drain-to-Source Voltage (up to 10,000 5 ms pulses at 150 °C) 120
I
D
Continuous (T
A
= 25°C) 60
A
Pulsed (25°C, T
PULSE
= 300 µs) 231
V
GS
Gate-to-Source Voltage 6
V
Gate-to-Source Voltage -4
T
J
Operating Temperature -40 to 150
°C
T
STG
Storage Temperature -40 to 150
Thermal Characteristics
PARAMETER TYP UNIT
R
θJC
Thermal Resistance, Junction-to-Case 0.5
°C/W R
θJB
Thermal Resistance, Junction-to-Board 1.4
R
θJA
Thermal Resistance, Junction-to-Ambient (Note 1) 53
Note 1: R
θJA
is determined with the device mounted on one square inch of copper pad, single layer 2 oz copper on FR4 board.
See https://epc-co.com/epc/documents/product-training/Appnote_Thermal_Performance_of_eGaN_FETs.pdf for details.
# Dened by design. Not subject to production test.
Static Characteristics (T
J
= 25°C unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
BV
DSS
Drain-to-Source Voltage V
GS
= 0 V, I
D
= 0.4 mA 100 V
I
DSS
Drain-Source Leakage V
GS
= 0 V, V
DS
= 80 V 0.08 0.35
mA
I
GSS
Gate-to-Source Forward Leakage V
GS
= 5 V 0.02 2.3
Gate-to-Source Forward Leakage
#
V
GS
= 5 V, T
J
= 125°C 0.6 9
Gate-to-Source Reverse Leakage V
GS
= -4 V 0.06 0.4
V
GS(TH)
Gate Threshold Voltage V
DS
= V
GS
, I
D
= 7 mA 0.8 1.1 2.5 V
R
DS(on)
Drain-Source On Resistance V
GS
= 5 V, I
D
= 25 A 2.4 3.2 mΩ
V
SD
Source-Drain Forward Voltage
#
I
S
= 0.5 A, V
GS
= 0 V 1.5 V
Gallium Nitride’s exceptionally high electron mobility and low temperature coecient allows
very low R
DS(on)
, while its lateral device structure and majority carrier diode provide exceptionally
low Q
G
and zero Q
RR
. The end result is a device that can handle tasks where very high switching
frequency, and low on-time are benecial as well as those where on-state losses dominate.
Die Size: 3.5 x 1.95 mm
eGaN® FET DATASHEET
EPC2218
EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2022 | | 2
200
150
100
50
0
0 0.5 1.0 1.5 2.0 2.5 3.0
I
D
– Drain Current (A)
Figure 1: Typical Output Characteristics at 25°C
V
DS
– Drain-to-Source Voltage (V)
V
GS
= 5 V
V
GS
= 4 V
V
GS
= 3 V
V
GS
= 2 V
I
D
– Drain Current (A)
V
GS
– Gate-to-Source Voltage (V)
1.00.5 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Figure 2: Typical Transfer Characteristics
25˚C
125˚C
V
DS
= 3 V
25˚C
125˚C
V
DS
= 3 V
200
150
100
50
0
8
6
4
2
0
2.5 3.02.0 3.5 4.0 4.5 5.0
R
DS(on)
– Drain-to-Source Resistance (mΩ)
V
GS
– Gate-to-Source Voltage (V)
Figure 3: R
DS(on)
vs. V
GS
for Various Drain Currents
I
D
= 12 A
I
D
= 25 A
I
D
= 37 A
I
D
= 50 A
2.0 2.5 3.0 3.5 4.0 4.5 5.0
Figure 4: R
DS(on)
vs. V
GS
for Various Temperatures
R
DS(on)
– Drain-to-Source Resistance (mΩ)
V
GS
– Gate-to-Source Voltage (V)
25˚C
125˚C
V
DS
= 3 V
25˚C
125˚C
I
D
= 25 A
8
6
4
2
0
Dynamic Characteristics
#
(T
J
= 25°C unless otherwise stated)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
C
ISS
Input Capacitance
V
DS
= 50 V, V
GS
= 0 V
1189 1570
pF
C
RSS
Reverse Transfer Capacitance
4.3
C
OSS
Output Capacitance
562 843
C
OSS(ER)
Eective Output Capacitance, Energy Related (Note 2)
V
DS
= 0 to 50 V, V
GS
= 0 V
740
C
OSS(TR)
Eective Output Capacitance, Time Related (Note 3)
925
R
G
Gate Resistance
0.4 Ω
Q
G
Total Gate Charge
V
DS
= 50 V, V
GS
= 5 V, I
D
= 25 A 10.5 13.6
nC
Q
GS
Gate-to-Source Charge
V
DS
= 50 V, I
D
= 25 A
3.2
Q
GD
Gate-to-Drain Charge
1.5
Q
G(TH)
Gate Charge at Threshold
1.9
Q
OSS
Output Charge
V
DS
= 50 V, V
GS
= 0 V 46 69
Q
RR
Source-Drain Recovery Charge
0
# Dened by design. Not subject to production test.
All measurements were done with substrate connected to source.
Note 2: C
OSS(ER)
is a xed capacitance that gives the same stored energy as C
OSS
while V
DS
is rising from 0 to 50% BV
DSS
.
Note 3: C
OSS(TR)
is a xed capacitance that gives the same charging time as C
OSS
while V
DS
is rising from 0 to 50% BV
DSS
.