QUALIFICATION REPORT
EPC Reliability & Quality
EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2022 | | 1
EPC eGaN® FET
Qualication Report
EPC21601
EFFICIENT POWER CONVERSION
This report summarizes the Product Qualication results for EPC
part number EPC21601 which meets all required qualication
requirements and is released for production.
Qualication Test Overview
Samples of EPC21601 were subjected to a wide variety of stress tests,
according to JEDEC standard JESD47K. The stress tests include the
following:
– High Temperature Operating Life (HTOL): Parts are subjected to
recommended operating conditions at T
J
= 125°C for 1000 hours.
– Temperature Humidity Bias (THB): Parts are tested at recommended
operating conditions while exposed to ambient temperature of
85°C and 85% relative humidity (RH).
– High Temperature Storage Life (HTSL): Parts are subjected to a bake
at 150°C for 1000 hours.
– Preconditioning (PC): Parts undergo the following steps in sequence:
(1) 125°C bake for a minimum of 24 hours; (2) Moisture Sensitivity
Level 1 (MSL1) conditions (see MSL1 details below); (3) three times
reow.
Scope
This report covers the qualication tests performed on EPC21601 for
its component-level qualication. EPC21601 is a 40 V, 10 A, 3.3 V logic,
eToF™ Laser Driver Integrated Circuit (IC) and it uses wafer level chip
scale packaging with a ball grid array (BGA) conguration.
Part Number
Die Size
(mm x mm)
EPC21601 S (1.5 x 1)
– Unbiased highly accelerated test (uHAST): Parts are stressed in a
non-condensing humid environment for 96 hours at 130°C, 85% RH,
and vapor pressure 33.3 psia.
– Temperature cycling (TC): Parts are subjected to alternating low and
high temperature extremes from -40°C to +125°C for a total of 850
cycles.
– MSL1: Parts are subjected to moisture and temperature conditions,
and three cycles of reow. MSL1 is the most stringent of the moisture
sensitivity levels, requiring 85°C and 85% RH for 168 hours.
All devices tested in this qualication underwent external visual
inspection. Chips were inspected using an optical microscope to check for
signs of physical damage to the chip-scale package, e.g., edge chipping
or cracks, resulting from assembly, transit, or inadequate handling.
Damaged parts were removed from the test population.
Parametric measurements were performed at 25°C on all the samples
before and after the stress tests to verify compliance with the
specications listed on the product datasheet. The parameters measured
include quiescent and operating currents of the driver (V
DD
pin), DC static
parameters of the output transistor such as threshold voltage and drain-
source leakage current, and input threshold voltages and hysteresis for
the logic input signal (V
IN)
.
For most of the qualication tests, parts were mounted onto high Tg FR-4
adaptor cards with four layers and 1.6 mm in thickness. Type-4 SAC305
solder paste with water-soluble (W/S) ux was used for mounting the
parts onto the adaptor cards. After assembly, ux residue was cleaned
using deionized (DI) water.
Dr. Alejandro Pozo Arribas, Director of Reliability, Efficient Power Conversion