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© 2022 ROHM Co., Ltd.
No. 65AN016E Rev.001
APRIL 2022
Application Note
Linear Regulator Series
Thermal Resistance Data: SSOP5
BD9xxN1G-C Series
This application note provides the thermal resistance data of the SSOP5 package used for the thermal design of the BD9xxN1G-C series linear
regulator IC.
Product Summary
Model name: BD9xxN1G-C series
Package name: SSOP5
Function: Linear regulator (LDO) IC
See Datasheet for more details.
Package
D
W
H
SSOP5
W (typ) D (typ) H (max)
2.9 mm × 2.8 mm × 1.25 mm
Measurement environment
Content
Standard
Measurement environment
JEDEC STANDARD
JESD51-2A (Still Air)
Measurement board standard
JEDEC STANDARD
JESD51-3
JESD51-7
Thermal resistance
θ
JA
(°C/W)
Ψ
JT
(°C/W)
271.3
46
194.2
39
146.7
37
θ
JA
: Thermal resistance between
junction temperature T
J
-
ambient temperature T
A
Ψ
JT
: Thermal characterization parameter between
Junction temperature T
J
-
package surface center temperature T
T
Note: The thermal resistances and thermal characterization
parameters in this application note are based on measurement under
a JEDEC environment and may not always be consistent with the
values for actual equipment. It is necessary to consider variations in
the values due to the PCB characteristics, PCB layout, parts layout,
chassis shape, surrounding environment, and so on.
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Application Note
Thermal Resistance Data: SSOP5 (IC: BD9xxN1G-C Series)
© 2022 ROHM Co., Ltd.
No. 65AN016E Rev.001
APRIL 2022
1-layer board sectional view
Footprint dimensions
Top layer layout
Top layer layout
0.6
1.0
0.95
2.4
0.95
Top layer
PCB specification, 1 layer (1s)
Conforms to JEDEC standard JESD51-3
Item
Value
Board thickness
1.57 mm
Board outline dimensions
76.2 mm × 114.3 mm
Board material
FR-4
Trace thickness
(Finished thickness)
70 μm (2 oz)
Lead width
0.254 mm
Copper foil area
Footprint
[ 50 mm
2
to 600 mm
2
]
76.2mm
114.3mm
Footprint
SSOP5_1S Rev.A
Footprint
50 mm
2
100 mm
2
300 mm
2
600 mm
2
SSOP5_1S Rev.A
50mm^2
SSOP5_1S Rev.A
100mm^2
SSOP5_1S Rev.A
300mm^2
SSOP5_1S Rev.A
600mm^2