APPLICATION NOTE

R01AN3995EJ0100 Rev.1.00 Page 1 of 186

Oct 19, 2017

RX651 Group

SH7083/SH7084/SH7085/SH7086 to RX651

Microcontroller Migration Guide

Summary

This application note describes points requiring special attention, points of difference, etc., that need to be borne in

mind when replacing the SH7083, SH7084, SH7085, or SH7086 with the RX651 in a user system. For detailed

information on each function, refer to the latest version of the User’s Manual: Hardware.

In this application note the SH7083, SH7084, SH7085, and SH7086 are referred to collectively as the SH7080 Group,

and the specifications of the SH7086 are treated as representative. Although there are minor differences in functions and

pins among the products composing the SH7080 Group, functionally they are all basically equivalent to the SH7086.

This application note therefore applies to the entire SH7080 Group.

Target Devices

RX651/RX65N

Contents

1. CPU Architecture ............................................................................................................. 6

1.1 System Registers ........................................................................................................................ 6

1.1.1 General-Purpose Registers .................................................................................................. 6

1.1.2 Control Registers .................................................................................................................. 7

1.2 Option-Setting Memory ............................................................................................................ 10

1.2.1 Outline of Option-Setting Memory .................................................................................... 10

1.2.2 Endian Setting ..................................................................................................................... 12

1.2.3 Specifying TM Identification Data and Setting TM Enable Flags ................................... 12

1.2.4 OCD/Serial Programmer Settings ..................................................................................... 12

1.3 Reset Function .......................................................................................................................... 13

1.3.1 Reset Sources ..................................................................................................................... 13

1.3.2 Reset Sources and Initialization Scope ............................................................................ 14

1.3.3 Cold/Warm Start Determination Function ........................................................................ 15

1.3.4 Write Protection .................................................................................................................. 15

1.4 Clock Settings ........................................................................................................................... 15

1.4.1 Clock Sources ..................................................................................................................... 15

1.4.2 Clock Generation Circuit .................................................................................................... 15

1.4.3 Write Protection .................................................................................................................. 16

1.5 Operation Modes ....................................................................................................................... 17

1.5.1 Comparison of Operation Modes ...................................................................................... 17

1.5.2 Comparison of Memory ...................................................................................................... 18

1.5.3 Operation Mode Settings ................................................................................................... 21

1.5.4 Write Protection .................................................................................................................. 21

R01AN3995EJ0100

Rev.1.00

Oct 19, 2017

RX651 Group SH7083/SH7084/SH7085/SH7086 to RX651 Microcontroller Migration Guide

R01AN3995EJ0100 Rev.1.00 Page 2 of 186

Oct 19, 2017

1.6 Processor Modes ...................................................................................................................... 22

1.7 Exception Handling ................................................................................................................... 23

1.7.1 Types of Exception Handling ............................................................................................. 23

1.7.2 Exception Handling Priority ............................................................................................... 24

1.7.3 Basic Processing Sequence of Exception Handling ....................................................... 25

1.7.4 Vector Configuration .......................................................................................................... 26

1.7.5 Interrupt Masking by SR (SH7080 Group) and PSW (RX651) ......................................... 27

1.8 Interrupt Handling ..................................................................................................................... 28

1.8.1 Interrupt Controller ............................................................................................................. 28

1.8.2 Interrupt Flag Management ................................................................................................ 31

1.8.3 Fast Interrupt Control ......................................................................................................... 32

1.8.4 Noise Cancellation .............................................................................................................. 33

1.8.5 Multiple Interrupts ............................................................................................................... 33

1.8.6 Group Interrupts ................................................................................................................. 35

1.8.7 Software Configurable Interrupts ...................................................................................... 36

2. On-Chip Functions ......................................................................................................... 37

2.1 List of On-Chip Functions ........................................................................................................ 37

2.2 I/O Ports/Pin Function Controller (PFC) ................................................................................. 39

2.2.1 Number of I/O Ports ............................................................................................................ 39

2.2.2 I/O Settings .......................................................................................................................... 40

2.2.3 General I/O Setting Example .............................................................................................. 45

2.3 Buses .......................................................................................................................................... 46

2.3.1 Comparison of Specifications ........................................................................................... 46

2.3.2 Bus Block Diagrams ........................................................................................................... 47

2.3.3 SDRAM Read/Write Setting Example ................................................................................ 49

2.4 Interrupt Controller ................................................................................................................... 56

2.4.1 IRQ Usage Example ............................................................................................................ 56

2.5 Data Transfer Controller (DTC) ................................................................................................ 57

2.5.1 Comparison of Specifications ........................................................................................... 57

2.5.2 Register Comparison .......................................................................................................... 58

2.5.3 Activation Source Settings ................................................................................................ 58

2.5.4 DTC Vector Configuration .................................................................................................. 59

2.5.5 Allocation of Transfer Information .................................................................................... 60

2.5.6 Module Stop ......................................................................................................................... 61

2.5.7 Normal Transfer Setting Example ..................................................................................... 61

2.6 Direct Memory Access Controller (DMAC) ............................................................................. 65

2.6.1 Comparison of Specifications ........................................................................................... 65

2.6.2 DMAC Block Diagram ......................................................................................................... 66

2.6.3 Register Comparison .......................................................................................................... 69

2.6.4 Activation Source Settings ................................................................................................ 71