QUALIFICATION REPORT
EPC Reliability & Quality
EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2022 | | 1
EPC eGaN® FET
Qualication Report
EPC2071
EFFICIENT POWER CONVERSION
Dr. Alejandro Pozo Arribas, Director of Reliability, Efficient Power Conversion
This report summarizes the Product Qualication results for EPC
part number EPC2071. The EPC2071 meets all required qualication
requirements and is released for production.
Qualication Test Overview
EPC’s eGaN FETs were subjected to a wide variety of stress tests
under conditions that are typical for silicon-based power MOSFETs.
These tests included:
– High temperature, reverse bias (HTRB): Parts are subjected to a
drain-source voltage at the maximum rated temperature
– High temperature, gate bias (HTGB): Parts are subjected to a gate-
source voltage at the maximum rated temperature
– High temperature storage (HTS): Parts are subjected to heat at the
maximum rated temperature
– Moisture sensitivity level 1 (MSL1): Parts are subjected to moisture,
temperature, and three cycles of reow. MSL1 is the most stringent
of the moisture sensitivity levels, requiring 85°C and 85% humidity
for 168 hours.
– Temperature cycling (TC): Parts are subjected to alternating high
and low temperature extremes
– High temperature, high humidity, reverse bias (H3TRB): Parts are
subjected to humidity under high temperature with a drain-source
voltage applied
– Electrostatic Discharge (ESD) Sensitivity: Parts are tested under
Human Body Model (HBM) to assess device susceptibility to
electrostatic discharge events.
The stability of the devices is veried with DC electrical tests after
stress biasing. The electrical parameters are measured at time-zero and
at interim readout points at room temperature. Electrical parameters
such as the gate-source leakage, drain-source leakage, gate-source
threshold voltage, and on-state resistance are compared against the
data sheet specications. A failure is recorded when a part exceeds the
datasheet specications. eGaN FETs are stressed to meet the latest Joint
Electron Device Engineering Council (JEDEC) standards when possible.
Parts for all tests except for TC were mounted onto high Tg FR4 adaptor
cards. Adaptor cards of 1.6 mm in thickness with two copper layers were
used. The top copper layer was 1 oz. or 2 oz., and the bottom copper
layer was 1 oz.
Scope
The testing matrix in this qualication report covers the qualication
of EPC2071, a Wafer Level Chip Scale 100 V eGaN power transistor.
For device level tests, EPC2071 is qualied by matrix with EPC2218
and EPC2302, other qualied products with the same voltage rating
and device processing. Similarly, for package level tests EPC2071 is
qualied by matrix with EPC2218 since both share the same packaging
technology.
Part Number
Voltage
(V)
R
DS(on)
(mΩ)
Die Size
(mm x mm)
EPC2302
100
1.8
XL (5 x 3) - QFN
EPC2071
100
2.2
L (4.45 x 2.3)
EPC2218
100
3.2
L (3.5 x 1.95)
QUALIFICATION REPORT
EPC Reliability & Quality
EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2022 | | 2
High Temperature Gate Bias
For HTRB, EPC2071 is qualied by matrix with EPC2218 and EPC2302. As part of the matrix qualication, parts from one lot of EPC2071 were
subjected to 100% of the rated gate-source voltage at the maximum rated temperature for a stress period of 1000 hours.
High Temperature Storage
Both HTRB and HTGB were conducted at 150oC, the maximum rated temperature of the product, and the same temperature used for High
Temperature Storage. Therefore, the units reported for HTRB and HTGB cover this HTS test. As a result, the failure reported in HTRB is also reported
in HTS.
Temperature Cycling
Parts from one lot of EPC2071 were subjected to temperature cycling between -40°C and +125°C, with dwell time of 10 minutes and 2 cycles/hour
in accordance with the JEDEC Standard JESD22A104. The total duration of the test was 850 cycles. For this test the samples were stressed in bare
die form.
Table 2. High Temperature Gate Bias Test
Table 3. High Temperature Storage Test
Table 4. Temperature Cycling Test
Stress Test Part Number
Voltage
(V)
Die Size
(mm x mm)
Test Condition # of Failure
Sample Size
(unit x lot)
Duration
(Hrs)
HTGB
EPC2302
100 XL (5 x 3) - QFN T = 150°C, V
GS
= 6 V 0 77 x 3 1000
HTGB
EPC2071
100 L (4.45 x 2.3) T = 150°C, V
GS
= 6 V 0 77 x 1 1000
HTGB
EPC2218
100 L (3.5 x 1.95) T = 150°C, V
GS
= 6 V 0 77 x 2 1000
Stress Test Part Number
Voltage
(V)
Die Size
(mm x mm)
Test Condition # of Failure
Sample Size
(unit x lot)
Duration
(Hrs)
HTS
EPC2071
100 L (4.45 x 2.3) T = 150°C, Air 1 154 x 1 1000
HTS
EPC2218
100 L (3.5 x 1.95) T = 150°C, Air 0 154 x 2 1000
Stress Test Part Number
Voltage
(V)
Die Size
(mm x mm)
Test Condition # of Failure
Sample Size
(unit x lot)
Duration
(Cys)
TC
EPC2071
100 L (4.45 x 2.3) -40 to +125°C, Air 0 77 x 1 850
TC
EPC2218
100 L (3.5 x 1.95) -40 to +125°C, Air 0 77 x 3 850
High Temperature Reverse Bias
For HTRB, EPC2071 is qualied by matrix with EPC2218 and EPC2302. As part of the matrix qualication, parts from one lot of EPC2071 were
subjected to 80% of the rated drain-source voltage at the maximum rated temperature for a stress period of 1000 hours.
One failure was reported, since one of the test samples exceeded the drain to source (IDSS) specication limit on the datasheet. The reported value
was 0.621mA. The unit was still functional, and all other parameters, including I
GSS
, V
TH
, and R
DS(on)
were within datasheet specication.
Table 1. High Temperature Reverse Bias Test
Stress Test Part Number
Voltage
(V)
Die Size
(mm x mm)
Test Condition # of Failure
Sample Size
(unit x lot)
Duration
(Hrs)
HTRB
EPC2302
100 XL (5 x 3) - QFN T = 150°C, V
DS
= 80 V 0 77 x3 1000
HTRB
EPC2071
100 L (4.45 x 2.3) T = 150°C, V
DS
= 80 V 1 77 x1 1000
HTRB
EPC2218
100 L (3.5 x 1.95) T = 150°C, V
DS
= 80 V 0 77 x1 1000