C8051F018
C8051F019
TABLE OF CONTENTS
1. SYSTEM OVERVIEW......................................................................................................... 7
Table 1.1. Product Selection Guide.....................................................................................................................7
Figure 1.1. C8051F018 Block Diagram ..............................................................................................................8
Figure 1.2. C8051F019 Block Diagram ..............................................................................................................9
1.1. CIP-51 CPU.............................................................................................................................................
10
TM
Figure 1.3. Comp
arison of Peak MCU Execution Speeds.................................................................................10
Figure 1.4. On-Board Clock and Reset..............................................................................................................11
1.2. On-Board Memory ......................................................................................................................................12
Figure 1.5. On-Board Memory Map..................................................................................................................12
1.3. JTAG Debug and Boundary Scan ...............................................................................................................13
Figure 1.6. Debug Environment Diagram .........................................................................................................13
1.4. Programmable Digital I/O and Crossbar .....................................................................................................14
Figure 1.7. Digital Crossbar Diagram................................................................................................................14
1.5. Programmable Counter Array......................................................................................................................15
Figure 1.8. PCA Block Diagram .......................................................................................................................15
1.6. Serial Ports...................................................................................................................................................15
1.7. Analog to Digital Converter ........................................................................................................................16
Figure 1.9. ADC Diagram .................................................................................................................................16
1.8. Comparators.................................................................................................................................................17
Figure 1.10. Comparator Diagram.....................................................................................................................17
2. ABSOLUTE MAXIMUM RATINGS*.............................................................................. 18
3. GLOBAL DC ELECTRICAL CHARACTERISTICS.................................................... 18
4. PINOUT AND PACKAGE DEFINITIONS ..................................................................... 19
Table 4.1. Pin Definitions.................................................................................................................................. 19
Figure 4.1. TQFP-64 Pinout Diagram ...............................................................................................................21
Figure 4.2. TQFP-64 Package Drawing ............................................................................................................22
Figure 4.3. TQFP-48 Pinout Diagram ...............................................................................................................23
Figure 4.4. TQFP-48 Package Drawing ............................................................................................................24
5. ADC ...................................................................................................................................... 25
Figure 5.1. 10-Bit ADC Functional Block Diagram..........................................................................................25
5.1. Analog Multiplexer......................................................................................................................................25
5.2. ADC Modes of Operation............................................................................................................................26
Figure 5.2. 10-Bit ADC Track and Conversion Example Timing.....................................................................27
Figure 5.3. Temperature Sensor Transfer Function...........................................................................................27
Figure 5.4. AMX0CF: AMUX Configuration Register .....................................................................................28
Figure 5.5. AMX0SL: AMUX Channel Select Register (C8051F01x).............................................................29
Figure 5.6. ADC0CF: ADC Configuration Register (C8051F01x)...................................................................30
Figure 5.7. ADC0CN: ADC Control Register...................................................................................................31
Figure 5.8. ADC0H: ADC Data Word MSB Register......................................................................................32
Figure 5.9. ADC0L: ADC Data Word LSB Register .......................................................................................32
5.3. ADC Programmable Window Detector.......................................................................................................33
Figure 5.10. ADC0GTH: ADC Greater-Than Data High Byte Register...........................................................33
Figure 5.11. ADC0GTL: ADC Greater-Than Data Low Byte Register............................................................ 33
Figure 5.12. ADC0LTH: ADC Less-Than Data High Byte Register................................................................33
Figure 5.13. ADC0LTL: ADC Less-Than Data Low Byte Register.................................................................33
Figure 5.14. 10-Bit ADC Window Interrupt Examples, Right Justified Data...................................................34
Figure 5.15. 10-Bit ADC Window Interrupt Examples, Left Justified Data.....................................................35
Table 5.1. 10-Bit ADC Electrical Characteristics..............................................................................................36
6. COMPARATORS ............................................................................................................... 37
Figure 6.1. Comparator Functional Block Diagram..........................................................................................37
Figure 6.2. Comparator Hysteresis Plot.............................................................................................................38
Rev. 1.2 2