Rev. 1.2 11/03 Copyright © 2003 by Silicon Laboratories
Mixed-Signal 16KB ISP FLASH MCU Family
C8051F018
C8051F019
JTAG
16KB
ISP FLASH
1280 B
SRAM
SANITY
CONTROL
+
-
10-Bit
SAR
ADC
CLOCK
CIRCUIT
VREF
AMUX
TEMP
SENSOR
VOLTAGE
COMPARATORS
ANALOG PERIPHERALS
Port 0Port 1
UART
SMBus
SPI Bus
PCA
Port 2Port 3
CROSSBAR
Timer 0
Timer 1
Timer 2
Timer 3
DIGITAL I/O
HIGH-SPEED CON T ROLLER CORE
DEBUG
CIRCUITRY
21
INTERRUP T S
8051 CPU
(25MIPS)
+
-
ANALOG PERIPHERALS
- SAR ADC
10-bit
1LSB INL; No Missing Codes
Programmable Throughput up to 100ksps
Up to 8 External Inputs; Programmable as Single-
Ended or Differential
Data Dependent Windowed Interrupt Generator
Built-in Temperature Sensor ( 3C)
- Two Analog Comparators
Programmable Hysteresis Values
Configurable to Generate Interrupts or Reset
- Voltage Reference
2.4V; 15 ppm/C
Available on External Pin
- Precision VDD Monitor/Brown-out Detector
ON-CHIP JTAG DEBUG & BOUNDARY SCAN
- On-Chip Debug Circuitry Facilitates Full Speed, Non-
Intrusive In-System Debug (No Emulator Required!)
- Provides Breakpoints, Single Stepping, Watchpoints, Stack
Monitor
- Inspect/Modify Memory and Registers
- Superior Perform a nce to Emulation Systems Using ICE-
Chips, Target Pods, and Sockets
- IEEE1149.1 Compliant Boundary Scan
- Low Cost Development Kit
HIGH SPEED 8051 C CORE
- Pipelined Instruction Architecture; Executes 70% of
Instruction Set in 1 or 2 System Clocks
- Up to 25MIPS Throughput with 25MHz Clock
- Expanded Interrupt Handler
MEMORY
- 1280 (256 + 1k) Bytes Internal Data RAM
- 16k Bytes FLASH; In-System Programmable in 512 byte
Sectors
DIGITAL PERIPHERALS
- 4 Byte-Wide Port I/O; All are 5V tolerant
- Hardware SMBus
TM
(I2C
TM
Compatible), SPI
TM
, and UART
Serial Ports Available Concurrently
- Programmable 16-bit Counter/Timer Array with Five
Capture/Compare Modules
- Four General Purpose 16-bit Counter/Timers
- Dedicated Watch-Dog Timer
- Bi-directional Reset
CLOCK SOURCES
- Internal Programmable Oscillator: 2-to-16MHz
- External Oscillator: Crystal, RC,C, or Clock
- Can Switch Between Clock Sources on-the-fly; Useful in
Power Saving Modes
SUPPLY VOLTAGE ........................2.8V to 3.6V
- Typical Operating Current: 12.5mA @ 25MHz
- Multiple Power Saving Sleep and Shutdown Modes
64-Pin TQFP, 48-Pin TQFP
Temperature Range: –40C to +85C
C8051F018
C8051F019
TABLE OF CONTENTS
1. SYSTEM OVERVIEW......................................................................................................... 7
Table 1.1. Product Selection Guide.....................................................................................................................7
Figure 1.1. C8051F018 Block Diagram ..............................................................................................................8
Figure 1.2. C8051F019 Block Diagram ..............................................................................................................9
1.1. CIP-51 CPU.............................................................................................................................................
10
TM
Figure 1.3. Comp
arison of Peak MCU Execution Speeds.................................................................................10
Figure 1.4. On-Board Clock and Reset..............................................................................................................11
1.2. On-Board Memory ......................................................................................................................................12
Figure 1.5. On-Board Memory Map..................................................................................................................12
1.3. JTAG Debug and Boundary Scan ...............................................................................................................13
Figure 1.6. Debug Environment Diagram .........................................................................................................13
1.4. Programmable Digital I/O and Crossbar .....................................................................................................14
Figure 1.7. Digital Crossbar Diagram................................................................................................................14
1.5. Programmable Counter Array......................................................................................................................15
Figure 1.8. PCA Block Diagram .......................................................................................................................15
1.6. Serial Ports...................................................................................................................................................15
1.7. Analog to Digital Converter ........................................................................................................................16
Figure 1.9. ADC Diagram .................................................................................................................................16
1.8. Comparators.................................................................................................................................................17
Figure 1.10. Comparator Diagram.....................................................................................................................17
2. ABSOLUTE MAXIMUM RATINGS*.............................................................................. 18
3. GLOBAL DC ELECTRICAL CHARACTERISTICS.................................................... 18
4. PINOUT AND PACKAGE DEFINITIONS ..................................................................... 19
Table 4.1. Pin Definitions.................................................................................................................................. 19
Figure 4.1. TQFP-64 Pinout Diagram ...............................................................................................................21
Figure 4.2. TQFP-64 Package Drawing ............................................................................................................22
Figure 4.3. TQFP-48 Pinout Diagram ...............................................................................................................23
Figure 4.4. TQFP-48 Package Drawing ............................................................................................................24
5. ADC ...................................................................................................................................... 25
Figure 5.1. 10-Bit ADC Functional Block Diagram..........................................................................................25
5.1. Analog Multiplexer......................................................................................................................................25
5.2. ADC Modes of Operation............................................................................................................................26
Figure 5.2. 10-Bit ADC Track and Conversion Example Timing.....................................................................27
Figure 5.3. Temperature Sensor Transfer Function...........................................................................................27
Figure 5.4. AMX0CF: AMUX Configuration Register .....................................................................................28
Figure 5.5. AMX0SL: AMUX Channel Select Register (C8051F01x).............................................................29
Figure 5.6. ADC0CF: ADC Configuration Register (C8051F01x)...................................................................30
Figure 5.7. ADC0CN: ADC Control Register...................................................................................................31
Figure 5.8. ADC0H: ADC Data Word MSB Register......................................................................................32
Figure 5.9. ADC0L: ADC Data Word LSB Register .......................................................................................32
5.3. ADC Programmable Window Detector.......................................................................................................33
Figure 5.10. ADC0GTH: ADC Greater-Than Data High Byte Register...........................................................33
Figure 5.11. ADC0GTL: ADC Greater-Than Data Low Byte Register............................................................ 33
Figure 5.12. ADC0LTH: ADC Less-Than Data High Byte Register................................................................33
Figure 5.13. ADC0LTL: ADC Less-Than Data Low Byte Register.................................................................33
Figure 5.14. 10-Bit ADC Window Interrupt Examples, Right Justified Data...................................................34
Figure 5.15. 10-Bit ADC Window Interrupt Examples, Left Justified Data.....................................................35
Table 5.1. 10-Bit ADC Electrical Characteristics..............................................................................................36
6. COMPARATORS ............................................................................................................... 37
Figure 6.1. Comparator Functional Block Diagram..........................................................................................37
Figure 6.2. Comparator Hysteresis Plot.............................................................................................................38
Rev. 1.2 2