eGaN® FET DATASHEET
EPC23101
EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2021 | | 1
EPC’s ePower
TM
Stage and Chipset integrate input logic interface, level shifting, bootstrap charging
and gate drive buer circuits along with eGaN output FETs. Integration is implemented using EPC’s
proprietary GaN IC technology. The end result is a Power Stage that translates logic level input to
high voltage and high current power output that is smaller in size, easier to manufacture, simpler to
design and more ecient to operate.
EPC23101 ePower
TM
Chipset
Applications
• Buck, Boost, Half-Bridge, Full Bridge or LLC Converters
• Single-Phase and Three-Phase Motor Drive Inverter
Features
• Integrated high side eGaN® FET with internal gate
driver and level shifter
• Gate driver output to drive external low side eGaN FET
• 5 V external bias supply
• 3.3 V or 5 V CMOS input logic levels
• Independent high side and low side control inputs
• Cross conduction lockout logic keeps both FETs o
when logic inputs are both high at same time
• External resistors to tune SW switching times and
over-voltage spikes above rail and below ground
• Robust level shifter operating for hard and soft
switching conditions
• False trigger immunity from fast switching transients
• Synchronous charging for high side bootstrap supply
• Low quiescent current mode from external V
DRV
supply when V
DD
Disable Input pin is pulled up
• Undervoltage lockout for internal low side and high
side bias supplies
• Active gate pull-down for HS FET and LS gate drive
with loss of V
DRV
supply
• Chipset of compatible
high and low side devices
in QFN packages with
optimized pinouts
between the two devices
EFFICIENT POWER CONVERSION
HAL
EPC23101 – ePower™ Chipset
V
IN
, 100 V
I
Load
, 65 A
Key Parameters
PARAMETER VALUE UNIT
Power Stage Load Current (1 MHz) 65
[1]
A
Operating PWM Frequency Range 3
[2]
MHz
Absolute Maximum Input Voltage 100
VOperating Input Voltage Range 80
Nominal Bias Supply Voltage 5
Chipset Information
PART NUMBER Rated R
DS(on)
at 25°C QFN Package Size (mm)
EPC23101
3.3 mΩ 3.5 x 5
EPC2302
1.8 m�� 3 x 5
Output Current and PWM Frequency Ratings are functions of Operating Conditions. Appropriate derating should be
applied to keep T
J
at less than 125 °C. See Notes 1 & 2.
All exposed pads feature wettable anks that allow side wall solder inspection. High voltage and low voltage pads
are separated by 0.6 mm spacing to meet IPC rules. Recommended to use EPC2302 as companion low side FET for
the chipset.
Buck Converter, V
IN
= 48 V, V
OUT
= 12 V, Deadtime = 10 ns, L = 2.2 µH, DCR = 700 µΩ, EPC23101 + EPC2302,
Airow = 1000 LFM. See EPC90142 Quick Start Guide for details (bit.ly/EPC90142).
PRELIMINARY
Figure 1: Performance Curves
500 kHz
750 kHz
1 MHz
Efficiency (%)
Losses (W)
I
OUT
(A)
98
96
94
92
90
88
50
40
30
20
10
0
0 10 20 30 40 50 60 70
eGaN® FET DATASHEET
EPC23101
EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2021 | | 2
General Description
The EPC23101 ePower
TM
IC integrates a half-bridge gate driver with an
internal high side FET. It is designed as part of a chipset with a companion
low side eGaN® FET such as the EPC2302. Integration is implemented
using EPC’s proprietary GaN IC technology. The high side monolithic
chip integrates input logic interface, level shifting, bootstrap charging
and gate drive buer circuits along with a high side eGaN output FET.
The low side output FET is driven by the gate driver output of the GaN IC
to congure a half-bridge power stage.
The on-chip gate drive buers practically eliminate eects of common
source inductance and gate drive loop inductance. Power loop inductance
is minimized by compatible high side to low side pinout conguration
that facilitates optimal layout technique. Switching times are tuned by
external resistors to achieve 1–3 ns rise and fall times from 0–48 V at full
load current. Over-voltage spikes can be controlled to less than +10 V
above rail and –10 V below ground during hard switching transitions by
choosing the tuning resistors, R
BOOT
and R
DRV
.
The EPC23101 IC only requires an external 5 V V
DRV
power supply. Internal
low side and high side power supplies, V
DD
and V
BOOT
, are generated
from the external supply via a series connected switch. The internal
supplies can be cut o to save quiescent power by turning o the switch
with 5 V applied to the EN pin.
Figure 2: Functional Block Diagram
The charging path for the oating bootstrap supply is activated with L
SIN
logic. It uses eGaN FET as the series switch that minimizes power losses
by eliminating reverse recovery. This synchronous bootstrap charging
circuit also minimizes voltage drop in the charging path.
Robust level shifters from low side to high side channels are designed to
operate correctly even at large negative clamped voltage and to avoid
false trigger from fast dv/dt transients including those driven by external
sources or other phases.
Protection is provided by high side and low side under-voltage lockout
to keep both FETs o at low supply voltages. If the supply voltages drop
even lower or are lost while V
IN
is active at greater than 10 V, another
active pull-down circuit is used with biasing from V
IN
to prevent
destructive turn-on of both FETs from gate to drain leakage..
The EPC23101 IC is capable of interfacing to digital controllers that use
standard 3.3 V or 5 V CMOS logic levels. Separate and independent high
side and low side logic control inputs allow external controllers to set
xed or adaptive dead times for optimal operating eciency. Cross
conduction prevention logic keeps both FETs o when logic inputs are
both high at the same time.
The FET gate drive voltages are derived from the internal low side and
high side power supplies. Full gate drive voltages are only available after
the HS
IN
and LS
IN
PWM inputs start to operate for a few cycles.
LS
IN
HS
IN
V
DD
C
DD
V
DRV
C
DRV
C
BOOT
EPC23101
EPC2302
C
IN
V
IN
150 k
SW
GND
GND
V
DD
V
IN
V
Boot
V
DRV
R
Boot
R
DRV
LG
OUT
Sync
boot
Logic
+
UVLO
+
Cross-
over
LO
Level
shift
Delay
match
PGND
SW
VIN
1
3
5
14
6
7
8
13
10, 12
9, 11
4
2
Enable
logic
Gate
driver
EN
Gate
driver
High side