January 31, 2020 © 2019 Transphorm Inc. Subject to change without notice.
tp65h150lsg.2 1
TP65H150LSG
650V GaN FET PQFN Series
Features
• JEDEC qualified GaN technology
• Dynamic R
DS(on)eff
production tested
• Robust design, defined by
— Intrinsic lifetime tests
— Wide gate safety margin
— Transient over-voltage capability
• Very low Q
RR
• Reduced crossover loss
• RoHS compliant and Halogen-free packaging
Benefits
• Improves efficiency/operation frequencies over Si
• Enables AC-DC bridgeless totem-pole PFC designs
— Increased power density
— Reduced system size and weight
— Overall lower system cost
• Easy to drive with commonly-used gate drivers
• GSD pin layout improves high speed design
Applications
• Datacom
• Broad industrial
• PV inverter
• Servo motor
Description
The TP65H150LSG 650V, 150mΩ Gallium Nitride (GaN) FET
is a normally-off device. It combines state-of-the-art high
voltage GaN HEMT and low voltage silicon MOSFET
technologies—offering superior reliability and performance.
Transphorm GaN offers improved efficiency over silicon,
through lower gate charge, lower crossover loss, and smaller
reverse recovery charge.
Related Literature
• AN0009: Recommended External Circuitry for GaN FETs
• AN0003: Printed Circuit Board Layout and Probing
• AN0010: Paralleling GaN FETs
• AN0012: PQFN Tape and Reel Information
Ordering Information
Part Number Package
Package
Configuration
TP65H150LSG-TR 8 x 8mm PQFN Source
Key Specifications
V
DSS
(V) 650
V
(TR)DSS
(V) 800
R
DS(on)eff
(mΩ) max* 180
Q
RR
(nC) typ 44
Q
G
(nC) typ 8.2
* Dynamic on-resistance; see Figures 18 and 19
Cascode Device Structure
Cascode Schematic Symbol
G
S
D
TP65H150LSG
8x8 PQFN
(bottom view)
* Add “-TR” suffix for tape and reel
January 31, 2020 transphormusa.com
tp65h150lsg.2 2
TP65H150LSG
Thermal Resistance
Symbol Parameter Maximum Unit
R
ΘJC
Junction-to-case 1.8 °C/W
R
ΘJA
Junction-to-ambient
f
62 °C/W
Absolute Maximum Ratings (T
c
=25°C unless otherwise stated.)
Symbol Parameter Limit Value Unit
V
DSS
Drain to source voltage (T
J
= -55°C to 150°C) 650
V
V
(TR)DSS
Transient drain to source voltage
a
800
V
GSS
Gate to source voltage ±20
P
D
Maximum power dissipation @T
C
=25°C 69 W
I
D
Continuous drain current @T
C
=25°C
b
15 A
Continuous drain current @T
C
=100°C
b
9.5 A
I
DM
Pulsed drain current (pulse width: 10µs) 60 A
(di/dt)
RDMC
Reverse diode di/dt, repetitive
c
1200 A/µs
(di/dt)
RDMT
Reverse diode di/dt, transient
d
2400 A/µs
T
C
Operating temperature
Case -55 to +150 °C
T
J
Junction -55 to +150 °C
T
S
Storage temperature -55 to +150 °C
T
SOLD
Reflow soldering temperature
e
260 °C
Notes:
a. In off-state, spike duty cycle D<0.01, spike duration <1µs
b. For increased stability at high current operation, see Circuit Implementation on page 3
c. Continuous switching operation
d. ≤300 pulses per second for a total duration ≤20 minutes
e. Reflow MSL3