SiT9501
Ultra-low Jitter Differential XO for Standard Networking Frequencies
ADVANCED
Description
The SiT9501 is a differential MEMS oscillator that is
engineered for low-jitter applications requiring standard
networking frequencies from 25 MHz to 644.53125 MHz.
A unique FlexSwing output-driver performs like
LVPECL but provides independent control of voltage
swing and DC offset to simplify interfacing with chipsets
having non-standard input voltage requirements and
eliminate all external source-bias resistors. The device
also integrates multiple on-chip regulators to filter power
supply noise, eliminating the need for an external
dedicated LDO.
The SiT9501 can be factory programmed for specific
combinations of frequency, stability, voltage, output
signaling, and pin 1 functionality. Programmability enables
designers to optimize clock configurations while
eliminating long lead times and customization costs
associated with quartz devices where each combination is
custom built.
The wide frequency range and programmability makes
this device ideal for communications, enterprise, and
industrial applications that require a variety of frequencies
and operate in noisy environments.
Refer to Manufacturing Notes for proper reflow profile,
tape and reel dimension, and other manufacturing related
information.
Features
14 Standard networking frequencies from 25 MHz to
644.53125 MHz
70 fs RMS typical phase jitter, 12 kHz to 20 MHz
Excellent power-supply noise rejection
LVPECL, LVDS, HCSL, Low-power HCSL, and
FlexSwing signaling options
±20, ±25, ±30, and ±50 ppm frequency stabilities
Wide temperature support up to -4C to 10C
Factory programmable options for low lead time
1.8 V, 2.5 V, 3.3 V, and wide continuous range power
supply voltage
2 x 1.6, 2.5 x 2, 3.2 x 2.5 mm x mm package
(Contact SiTime for 7 x 5,
and 5 x 3.2 mm x mm
packages)
Applications
400G/800G network equipment
Optical modules
Coherent optics
Network switches, routers
Industrial networking equipment
Block Diagram
Figure 1. SiT9501 Block Diagram
Package Pinout
43
1 6
GND
VDD
OUTP
52
NF OUTN
OE/NF
Figure 2. Pin Assignments (Top view)
(Refer to Table 18 for Pin Descriptions)
Rev 0.58
23 March 2021
www.sitime.com
Rev 0.58
Page 2 of 25
www.sitime.com
ADVANCED
Typical Phase Jitter (70 fs RMS) and Phase Noise Data
Table 1. Phase Noise for 3.3 V 156.25 MHz LVPECL Device at 25°C
Offset Frequency (Hz)
Phase Noise (dBc/Hz)
100
-87
1k
-114
10k
-141
100k
-151
1M
-152
10M
-165
40M
-170
Figure 3. Phase Noise Plot of 3.3 V 156.25 MHz LVPECL Device at 25°C