Product Overview
NB3N502: PLL Clock Multiplier, 14 MHz - 190 MHz, 3.3 V / 5.0 V
For complete documentation, see the data sheet.
The NB3N502 is a clock multiplier device that generates a low jitter,TTL/CMOS level output clock which is a precise multiple of the
external input reference clock signal source. The device is a cost efficient replacement for the crystal oscillators commonly used in
electronic systems. It accepts a standard fundamental mode crystal or an external reference clock signal. Phase-Locked-Loop (PLL)
design techniques are used to produce an output clock up to 190 MHz with a 50% duty cycle. The NB3N502 can be programmed via
two select inputs (S0, S1) to provide an output clock (CLKOUT) at one of six different multiples of the input frequency source, and at
the same time output the input aligned reference clock signal (REF).
Features
Clock Output Frequency up to 190 MHz
Operating Range: VDD = 3 V to 5.5 V
Low Jitter Output of 15 ps One Sigma (RMS)
Zero ppm Clock Multiplication Error
45% 55% Duty Cycle
Crystal Reference Input Range of 5 MHz to 27 MHz
Input Clock Frequency Range of 2 MHz to 50 MHz
Full Industrial Temperature Range -40C to 85C
Applications End Products
Clock Generation Set Top Box
Consumer Electronics Servers
Industrial Routers
Networking and Telecommunication Desktop Computer
Part Electrical Specifications
Product Pricing ($/Unit) Compliance Statu
s
Input
Level
Outp
ut
Level
V
S
Typ
(V)
f
in
Typ
(MHz
)
f
out
Typ
(MHz
)
t
Jitter
(
Cy-
Cy)
Typ
(ps)
t
Jitter
(
Perio
d)
Typ
(ps)
t
Jitter
(
Φ)
Typ
(ps)
t
R
&
t
F
Typ
(ps)
t
R
&
t
F
Max
(ps)
T
A
Min
(°C)
T
A
Max
(°C)
Pack
age
Type
NB3N502DG
Pb-free
Halide free
non AEC-Q
and PPAP
Activ
e
CM
OS
Crys
tal
CMO
S
3
5.5
2-50
5-27
14-
190
±40 15 1000 1000 -40 85 SOIC
-8
NB3N502DR2G
Pb-free
Halide free
non AEC-Q
and PPAP
Activ
e
CM
OS
Crys
tal
CMO
S
3
5.5
2-50
5-27
14-
190
±40 15 1000 1000 -40 85 SOIC
-8
For more information please contact your local sales support at www.onsemi.com.
Created on: 5/21/2021