Analog Standard Cell
COMP – CMOS Comparator
Datasheet Rev. A, 29.07.2015 www.ams.com Page 1 of 3
Key Parameters
Small Area 0.0058 mm
2
Size x = 30.5 µm, y = 190 µm
Supply Voltage 3.0 to 3.6V
Temperature Range -40 to 125°C
Power Down Mode
Hysteresis typ. 17mV
Symbol
Process Characteristics
Fabrication Process: C35 (0.35µm)
General Description
The COMP cell is a fast comparator cell with typ. 17mV hysteresis and is intended for clock
recovery purposes.
The cell provides a power down mode.
An external bias current of 7µA to 19µA must be supplied externally (cell BBIAS may be used).
1 Pin Description
Pin
Description
Cap.
INP
Pos. Input Voltage
Analog
INN
Neg. Input Voltage
Analog
OUT
Output Voltage
Digital
XPD
Power Down not
Digital
PD
Power Down
Digital
VDDA
Positive Analog Supply Voltage
Supply
VSSA
Negative Analog Supply Voltage
Supply
IBIAS
Input Current
Analog
COMP – CMOS Comparator
Datasheet Rev. A, 29.07.2015 www.ams.com Page 2 of 3
2 TECHNICAL DATA FOR 3.3V SUPPLY
(T
junction
= -40 to 125°C, VDDA=+3.0V to +3.6V, unless otherwise specified)
3 GENERAL PARAMETERS
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
T
junction
Junction Temperature
-40
27
125
°C
X
x – Size of macro cell
30.5
µm
Y
y – Size of macro cell
190
µm
4 DC PARAMETERS
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VthP
1)
Pos. Threshold Voltage
-7.3
-0.4
6.1
mV
VthN
1)
Neg. Threshold Voltage
-25.3
-17.3
-11.2
mV
Vos
1)
Offset Voltage
-16.3
-8.9
-2.6
mV
Hyst
1)
Hysteresis Voltage
14.6
16.8
19.1
mV
IBIAS
2)
Bias Current
7.3
11.4
19.5
µA
5 OUTPUT PARAMETERS
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Isource
3)
Output Source Current
6.0
11.0
19.5
mA
Isink
3)
Output Sink Current
5.2
10.4
18.7
mA
6 POWER REQUIREMENTS
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VDDA
Pos. Analog Supply Voltage
3.0
3.3
3.6
V
VSSA
Neg. Analog Supply Voltage
0
0
0
V
IDDA
Supply Current Analog
162
256
444
µA
Pdiss_tot
Total Power Consumption
0.48
0.86
1.60
mW
Pdiss_pd
Power Consumption in PD
490
nW
7 TRANSIENT PARAMETERS
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Tresp_r
4)
Response Time Rise
7
16
31
ns
Tresp_f
4)
Response Time Fall
4
9
18
ns
Twakeup
Wakeup Time
18
34
55
ns
1) The negative input INN was set to VDDA/2. Treshold voltages VthP and VthN are the input voltage needed to change
the output state in each direction. The offset voltage is defined as the average of VthP and VthN, while the hysteresis
voltage is the difference of these two voltages.
2) The bias current was produced with the cell BBIAS
3) The power consumption will vary with the output current
4) Input signal with 100mV step and 10mV overdrive