Application Note
USCi_AN0015 February 2018
Soldering and Rework of UnitedSiC THT Devices
Jonathan Dodge, P.E. Soldering and rework
USCi_AN0015 February 2018
Soldering and Rework of UnitedSiC THT Devices
1
United Silicon Carbide
1 Scope
This document provides recommendations for soldering and rework of UnitedSiC through-hole technology (THT)
devices, including (but not limited to) TO-247 with three or four leads, and TO-220. Included are
recommendations for production assembly soldering as well as rework.
2 UnitedSiC THT Construction
UnitedSiC THT devices are constructed on a 100 % matte tin plated copper lead-frame, as shown in a cross-section
drawing of a TO-247 below in Figure 1. The TO-220 and other THT device construction are similar.
Figure 1 Cross section of TO-247 (bond wires excluded and some proportions exaggerated for clarity)
In the case of SiC JFET and SiC junction-barrier Schottky diode, the chips are attached directly to the lead-frame
with either high-temperature solder or silver sintering. The low-voltage MOSFET used in cascode devices is
mounted on a ceramic substrate. The ceramic substrate is often referred to as DBC, which stands for the direct
bonded copper, with the top-side copper forming a printed circuit pattern.
All Generation 3 (part number begins with UJ3 or UF3) and newer JFETs and cascodes use silver sintering.
UnitedSiC diodes except some rated at 50 A or higher are silver sintered. Silver sintered connections maintain
integrity at temperatures of several hundred degrees C, and therefore there is no concern of re-melting sintered
connections during PCB assembly or rework processes. A further advantage of silver sintering versus solder is
significantly reduced thermal resistance between the chip and the copper lead-frame, which results in a lower
junction-case thermal resistance listed in datasheets. All cascodes prior Generation 3 use high-lead content, high-
temperature solder that melts at 380 °C.
All UnitedSiC products are RoHS compliant, even those that use solder instead of sintering. Use of lead in high
melting temperature solder is allowed by the RoHS initiative.
3 Reflow Soldering
The major process steps in reflow soldering include application of solder paste to pads on the circuit board,
placement of components onto the solder paste, preheating, solder melting, and cooldown. Although reflow
soldering is typically used for surface-mount technology (SMT) devices, UnitedSiC THT devices are compatible with
reflow soldering providing the maximum temperature reached is less than 300 °C. It is recommended to limit the
time duration at temperatures above 250 °C to 10 seconds or less.
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Soldering and Rework of UnitedSiC THT Devices
USCi_AN0015 February 2018
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4 Wave Soldering
The major process steps in wave soldering include fixing the THT components to the circuit board and/or heat sink
on the board, preheat, passing the circuit board assembly across one or more waves of molten solder, and
cooldown. The process may also include application of flux before the soldering process, and washing afterward.
Figure 2 Typical dual-wave solder profile
All UnitedSiC THT devices are compatible with wave soldering processes providing the maximum temperature of
the solder is less than 300 °C. It is recommended to limit the time duration of leads exposed to solder at
temperatures above 250 °C to 10 seconds or less. In the recommended dual-wave solder profile of Figure 2, T
peak
is
235 or 260 °C for tin-lead or lead-free solder respectively, and the maximum duration at both peaks combined is
10 seconds. The preheat temperature T
preheat
is typically 100 to 130 °C.
Bond wires are not shown in Figure 1, but wire bond connection integrity is an important factor relating to rapid,
extreme temperature cycling. A THT device should not be immersed into molten solder. Only the leads should be
exposed to the molten solder, preferably after preheating.
5 Manual Solder and Rework
Solder iron tip temperatures commonly far exceed 300 °C, which is necessary to preheat the device lead and the
PCB pad, and to melt the solder so that it flows and adheres to make a good solder joint. Using the minimum
solder iron tip temperature to make a good solder joint is recommended. However, minimizing the soldering time
is more important than minimizing iron tip temperature. Substantial heat is drawn away from the joint by the
circuit board and the device lead, especially if a JFET/cascode drain lead or diode cathode lead is being soldered.
This requires the iron tip temperature to far exceed the melting temperature of the solder being applied in order
to quickly make the solder connection. The lead-frame temperature near a semiconductor chip is much lower than
the iron tip temperature, unless the iron tip is left in direct contact with the device lead for an excessive duration.
Therefore, the maximum lead temperature for soldering in UnitedSiC datasheets is not to be interpreted as the
maximum solder iron tip temperature. The following practices generally ensure safe solder and rework of THT
devices.
Use thermal relief patterns on circuit board pads, which are “spokes” that connect from the plated through-
hole to copper pour and internal plane areas. See Figure 3 for an example. Connections to power planes are
very common for THT power devices. Eliminating thermal relief patterns in an effort to improve electrical
performance makes circuit board assembly impractical and unreliable because too much heat is drawn away
during the solder process, forcing far excessive solder time.