EFM32PG22 Gecko
Reference Manual
The EFM32PG22 family of microcontrollers is part of the Series 2
Gecko portfolio. EFM32PG22 MCUs are ideal for enabling energy-
friendly embedded applications.
The highly efficient solution combines a 76.8 MHz Cortex-M33 with rich analog and com-
munication peripherals to provide an industry-leading, energy efficient MCU for consum-
er and industrial applications.
KEY FEATURES
• 32-bit ARM® Cortex M33 core with up to
76.8 MHz maximum operating frequency
• Up to 512 kB of flash and 32 kB of RAM
• Low energy operation
• 26 uA/MHz
• 1.1 uA sleep (EM2)
• Secure Boot with Root of Trust and
Secure Loader (RTSL)
• 16-bit ADC with 16-channel scan
Timers and Triggers
32-bit bus
Peripheral Reflex System
Serial Interfaces I/O Ports
Analog I/F
Lowest power mode with peripheral operational:
USART
EUART
External
Interrupts
General
Purpose I/O
Pin Reset
Pin Wakeup
ADC
EM4—Shutoff
Energy Management
Brown-Out
Detector
Voltage
Regulator
Power-On
Reset
Security
Clock Management
HF Crystal
Oscillator
LF Crystal
Oscillator
Precision LF
RC Oscillator
HF
RC Oscillator
AES-128, AES-256,
SHA-1, SHA-2,
ECC
Ultra LF RC
Oscillator
Core / Memory
ARM Cortex
TM
M33 processor
with DSP, FPU and TrustZone
ETM Debug Interface RAM Memory
LDMA
Controller
Flash Program
Memory
Real Time
Capture Counter
Timer/Counter
Low Energy Timer Watchdog Timer
Protocol Timer
EM3—StopEM2—Deep SleepEM1—SleepEM0—Active
True Random Number
Generator
Fast Startup
RC Oscillator
Back-Up Real
Time Counter
I
2
C
PDM
DC-DC
Converter
Temperature
Sensor
Secure Boot RTSL
Secure Debug
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Table of Contents
1. About This Document ...........................23
1.1 Introduction ...............................23
1.2 Conventions ...............................24
1.3 Related Documentation ...........................25
2. System Overview .............................26
2.1 Introduction ...............................26
2.2 Block Diagrams..............................26
2.3 Features overview .............................27
3. System Processor ............................29
3.1 Introduction ...............................29
3.2 Features ................................30
3.3 Functional Description ...........................30
3.3.1 Interrupt Operation ...........................31
3.3.2 TrustZone ..............................31
3.3.3 Interrupt Request Lines (IRQ) .......................32
4. Memory and Bus System ..........................34
4.1 Introduction ...............................34
4.2 Functional Description ...........................35
4.2.1 Bus Matrix ..............................36
4.2.2 Flash ................................37
4.2.3 SRAM ...............................37
4.2.4 Peripherals ..............................37
5. MSC - Memory System Controller ......................43
5.1 Introduction ...............................43
5.2 Features ................................44
5.3 Functional Description ...........................44
5.3.1 Ram Configuration ...........................44
5.3.2 Instruction Cache............................45
5.3.3 Device Information (DI) Page .......................45
5.3.4 User Data (UD) Page Description ......................45
5.3.5 Bootloader ..............................45
5.3.6 Post-reset Behavior ...........................45
5.3.7 Flash Startup .............................45
5.3.8 Flash EM0 / EM1 Power Down .......................46
5.3.9 Wait-states ..............................46
5.3.10 Cortex-M33 If-Then Block Folding......................46
5.3.11 Line Buffering (Prefetch) .........................46
5.3.12 Erase and Write Operations........................47
5.4 DEVINFO - Device Info Page .........................48
5.4.1 DEVINFO Register Map .........................49
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