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Jun 01, 2020
Product Information
Overview
1.1 Features
This LSI chip includes a high-speed image signal processor (ISP) for use with cameras, an AI accelerator, and a
hardware engine which is capable of the real-time analysis of video data. This processor realizes processing from high-
level sensing through to analysis, assessment, and execution (control).
It supports applications such as AI-equipped IP cameras, robot vision, and so on.
The main features are listed below.
High-speed ISP for use with cameras
This proprietary ISP supports SLVS-EC and MIPI-CSI as CMOS image sensor interfaces. It allows the capture of high-
speed, high-resolution images such as high-resolution still images and 4K30p video.
AI accelerator
The dynamic reconfigurable processor (DRP) technology from Renesas supports various types of neural network and is
capable of realizing embedded AI while featuring low power consumption.
RZ/V Series, RZ/V2M
R01DO0017EJ0100
Rev.1.00
Jun 01, 2020
RZ/V Series, RZ/V2M
R01DO0017EJ0100 Rev.1.00 Page 2 of 6
Jun 01, 2020
CPU
Arm Cortex-A53
System
Audio I/F
I2S (1 ch.)
Analog
ADC (20 ch.)
Display I/F
MIP I DSI (4
lane s)
(D-PHY TX v1.1)
HDMI (1 ch.)
(v1.4a TX)
Image Sensor I/F
MIP I C SI-2 v1 .2
(4 lanes, 2 ch.)*
2
SLVS-EC v1.2
(8 lanes/4 lanes)*
2
Time rs
WDT (2 ch .)
Timer (32 ch.)
PWM (16 ch.)
Arm Debugger
(CoreS ight)
DMAC (16 ch.)
Power Control
L1 I cache
32 KB
NEON FPU
L2 cache: 512 KB
L1 D cache
32 KB
Arm Cortex-A53
L1 I cache
32 KB
NEON
L1 D cache
32 KB
FPU
Memory
RAMA
200 KB
Sensing and analyzing
Numeric Calculation
accelerator
AI a ccelera tor
(DRP-AI)
Multi-target d etection
(face, human body)
Video and graphics
H.2 65/H.264 multi code c
Camera ISP
JPEG accelerator
2D graphics e ngine
Security
Security IPTemperature sensor (2 ch.)
RAMB
1 MB
External memory I/F
LPDDR4 (32-bit)
NAND Flash (1 ch.)*
1
eMMC (1 ch.)*
1
Peripheral I/F
SDI (2 ch.)
USB3.1 (1 ch.)
Host/Peripheral
PCI express (1 lane )
GbitEther MAC (1 ch.)
I2C (4 ch.)
CSI (6 ch.)
UART (2 ch.)
GPIO
Motor control
Environ ment sensor I/F
Note 1. Only one of either NAND flash memory or eMMC can be used.
Note 2. The use of SLVS-EC and MIPI CSI-2 v1.2 are exclusive of each other.
Figure 1 Diagram of Functional Overview