GD32F4xx User Manual

Table of Contents

Table of Contents ............................................................................................................... 2

List of Figures ................................................................................................................... 22

List of Tables ..................................................................................................................... 30

1. System and memory architecture ........................................................................... 34

1.1. ARM Cortex-M4 processor .................................................................................................. 34

1.2. System architecture ........................................................................................................... 35

1.3. Memory map ..................................................................................................................... 38

1.3.1. Bit-banding ......................................................................................................................................... 41

1.3.2. On-chip SRAM memory ................................................................................................................... 41

1.3.3. On-chip flash memory overview ..................................................................................................... 42

1.4. Boot configuration ............................................................................................................. 42

1.5. System configuration registers (SYSCFG) ............................................................................. 44

1.5.1. Configuration register 0 (SYSCFG_CFG0) ................................................................................... 44

1.5.2. Configuration register 1 (SYSCFG_CFG1) ................................................................................... 45

1.5.3. EXTI sources selection register 0 (SYSCFG_EXTISS0) ............................................................ 46

1.5.4. EXTI sources selection register 1 (SYSCFG_EXTISS1) ............................................................ 47

1.5.5. EXTI sources selection register 2 (SYSCFG_EXTISS2) ............................................................ 49

1.5.6. EXTI sources selection register 3 (SYSCFG_EXTISS3) ............................................................ 50

1.5.7. I/O compensation control register (SYSCFG_CPSCTL) ............................................................ 51

1.6. Device electronic signature ................................................................................................. 52

1.6.1. Memory density information ............................................................................................................ 52

1.6.2. Unique device ID (96 bits) ............................................................................................................... 53

2. Flash memory controller (FMC) ............................................................................... 54

2.1. Introduction ....................................................................................................................... 54

2.2. Main features .................................................................................................................... 54

2.3. Function description........................................................................................................... 54

2.3.1. Flash memory architecture .............................................................................................................. 54

2.3.2. Read operations ................................................................................................................................ 56

2.3.3. Unlock the FMC_CTL/FMC_OBCTLx register ............................................................................. 56

2.3.4. Sector erase ...................................................................................................................................... 56

2.3.5. Mass erase ........................................................................................................................................ 58

2.3.6. Main flash programming .................................................................................................................. 59

2.3.7. OTP block programming .................................................................................................................. 61

2.3.8. Option bytes modify .......................................................................................................................... 61

2.3.9. Option bytes description .................................................................................................................. 61