Applications
Ethernet Networking Equipment
Features
♦ Crystal Oscillator Interface: 25MHz
♦ CMOS Input: 25MHz
♦ Output Frequencies for Ethernet
62.5MHz, 125MHz, 156.25MHz, 312.5MHz
♦ Low Jitter
0.14ps
RMS
(1.875MHz to 20MHz)
0.36ps
RMS
(12kHz to 20MHz)
♦ Excellent Power-Supply Noise Rejection
♦ No External Loop Filter Capacitor Required
MAX3679A
+3.3V, Low-Jitter Crystal to LVPECL
Clock Generator
________________________________________________________________
Maxim Integrated Products
1
Ordering Information
Typical Application Circuit
19-4858; Rev 0; 8/09
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
+
Denotes a lead(Pb)-free/RoHS-compliant package.
*
EP = Exposed pad.
Pin Configuration appears at end of data sheet.
PART TEMP RANGE PIN-PACKAGE
MAX3679AETJ+ -40°C to +85°C 32 TQFN-EP*
MAX3679A
V
CCA
MR
REF_IN
IN_SEL
QA_OE
QAC_OE
QB0_OE
QB1_OE
BYPASS
SELA1
SELA0
SELB0
RES1
SELB1
RES0
QA_C
X_OUT
X_IN GNDO_AGND
V
CC
V
CCO_A
V
CCO_B
V
DDO_A
10.5Ω
0.1μF
V
CC
36Ω
Z
0
= 50Ω
ASIC
125MHz
QA
50Ω
Z
0
= 50Ω
QA
Z
0
= 50Ω
ASIC
50Ω
125MHz
(V
CC
- 2V)
QB0
50Ω
Z
0
= 50Ω
QB0
Z
0
= 50Ω
ASIC
50Ω
312.5MHz
(V
CC
- 2V)
QB1
50Ω
Z
0
= 50Ω
QB1
Z
0
= 50Ω
ASIC
50Ω
312.5MHz
(V
CC
- 2V)
10μF
25MHz
(C
L
= 18pF)
33pF 27pF
0.01μF0.1μF 0.1μF 0.1μF 0.1μF
+3.3V ±5%
E V A L U A T I O N K I T A V A I L A B L E
General Description
The MAX3679A is a low-jitter precision clock generator
with the integration of three LVPECL and one LVCMOS
outputs optimized for Ethernet applications. The device
integrates a crystal oscillator and a phase-locked loop
(PLL) clock multiplier to generate high-frequency clock
outputs for Ethernet applications.
This proprietary PLL design features ultra-low jitter
(0.36psRMS) and excellent power-supply noise rejection,
minimizing design risk for network equipment.
MAX3679A
+3.3V, Low-Jitter Crystal to LVPECL
Clock Generator
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(V
CC
= +3.0V to +3.6V, T
A
= -40°C to +85°C, unless otherwise noted. Typical values are at V
CC
= +3.3V, T
A
= +25°C, unless other-
wise noted.) (Notes 1, 2, and 3)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Supply Voltage Range V
CC
, V
CCA
,
V
DDO_A
, V
CCO_A
, V
CCO_B
................................-0.3V to +4.0V
Voltage Range at REF_IN, IN_SEL,
SELA[1:0], SELB[1:0], RES[1:0],
QAC_OE, QA_OE, QB0_OE, QB1_OE,
MR, BYPASS ..........................................-0.3V to (V
CC
+ 0.3V)
Voltage Range at X_IN Pin ...................................-0.3V to +1.2V
Voltage Range at GNDO_A...................................-0.3V to +0.3V
Voltage Range at X_OUT ............................-0.3V to (V
CC
- 0.6V)
Current into QA_C ...........................................................±50mA
Current into QA, QA, QB0, QB0, QB1, QB1 .....................-56mA
Continuous Power Dissipation (T
A
= +70°C)
32-Pin TQFN (derate 34.5mW/°C above +70°C) .......2759mW
Operating Junction Temperature Range...........-55°C to +150°C
Storage Temperature Range .............................-65°C to +160°C
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Power-Supply Current I
CC
(Note 4) 77 100 mA
CONTROL INPUT CHARACTERISTICS
(SELA[1:0], SELB[1:0], IN_SEL, QAC_OE, QA_OE, QB1_OE, QB0_OE, MR, BYPASS Pins)
Input Capacitance C
IN
2 pF
Input Pulldown Resistor R
PULLDOWN
Pin MR 75 k
Input Logic Bias Resistor R
BIAS
Pins SELA[1:0], SELB[1:0], QB0_OE 50 k
Input Pullup Resistor R
PULLUP
Pins QAC_OE, QA_OE, QB1_OE, IN_SEL,
BYPASS
75 k
LVPECL OUTPUT SPECIFICATIONS (QA, QA, QB0, QB0, QB1, QB1 Pins)
T
A
= 0°C to +85°C
V
CC
-
1.13
V
CC
-
0.98
V
CC
-
0.83
Output High Voltage V
OH
T
A
= -40°C to 0°C
V
CC
-
1.18
V
CC
-
0.83
V
T
A
= 0°C to +85°C
V
CC
-
1.85
V
CC
-
1.7
V
CC
-
1.55
Output Low Voltage V
OL
T
A
= -40°C to 0°C
V
CC
-
1.90
V
CC
-
1.55
V
Peak-to-Peak Output-Voltage
Swing (Single-Ended)
(Note 2) 0.6 0.72 0.9 V
P-P
Clock Output Rise/Fall Time 20% to 80% (Note 2) 200 350 600 ps
PLL enabled 48 50 52
Output Duty-Cycle Distortion
PLL bypassed (Note 5) 40 50 60
%
LVCMOS/LVTTL INPUT SPECIFICATIONS
(SELA[1:0], SELB[1:0], IN_SEL, QAC_OE, QA_OE, QB1_OE, QB0_OE, MR, BYPASS Pins)
Input-Voltage High V
IH
2.0 V
Input-Voltage Low V
IL
0.8 V