1. Errata Summary
The table below lists all known errata for the EFR32FG12 and all unresolved errata in revision C of the EFR32FG12.
Table 1.1. Errata Overview
Designator Title/Problem Workaround
Exists
Exists on Revision:
A B C
ADC_E213 ADC KEEPINSLOWACC Mode No X X X
ADC_E222 ADC EM2 Wakeup on a Comparator Match Disables EM2
Entry
Yes X — —
ADC_E224 ADC Warm-Up Ready Can Cause IDAC, ACMP, or CSEN to
Not Function
Yes X X —
ADC_E228 Limited ADC Sampling Frequency in EM2 No X X X
CSEN_E201 CSEN_DATA in Debug Mode Yes X X X
CSEN_E202 CSEN Baseline DMA Transfers Yes X X X
CUR_E203 Occasional Extra EM0/1 Current No X X X
DBG_E204 Debug Recovery with JTAG Does Not Work Yes X X X
DCDC_E204 Potential Brownout when Enabling the DCDC from Off to
Low Power Mode
Yes X X X
EMU_E209 Potential EM2 Lock-up when using IDAC or the Debugger
with the LDMA
Yes X — —
EMU_E211 Radio Clocks Remain Disabled After Voltage Scaling Yes X — —
EMU_E212 Delay Required Between Successive Voltage Scaling Com-
mands
Yes X X X
EMU_E214 Device Erase Cannot Occur if Voltage Scaling Level is Too
Low
Yes X X X
I2C_E202 Race Condition Between Start Detection and Timeout Yes X X X
I2C_E203 I2C Received Data Can be Shifted Yes X X X
I2C_E205 Go Idle Bus Idle Timeout Does Not Bring Device to Idle
State
Yes X X X
I2C_E206 Slave Holds SCL Low After Losing Arbitration Yes X X X
LES_E201 LFPRESC Can Extend Channel Start-Up Delay Yes X X X
RAM_E201 Timing Issues in Upper 192 kB of RAM No X — —
RMU_E202 External Debug Access Not Available After Watchdog or
Lockup Full Reset
Yes X X X
RMU_E203 AVDD Ramp Issue Yes X X —
RTCC_E203 Potential Stability Issue with RTCC Registers Yes X X X
RTCC_E204 Disabling the RTCC Backup RAM may Consume Extra Cur-
rent
Yes X X X
RTCC_E205 Wrap Event Can Be Missed Yes X X X
TIMER_E202 Continuous Overflow and Underflow Interrupts in Quadra-
ture Counting Mode
Yes X X X
USART_E201 USART DMA Transactions Fail with Slow Peripheral Clocks No X X X
EFR32FG12 Errata
Errata Summary
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