20 V, 200 mA, Low Noise,
CMOS LDO Linear Regulator
Data Sheet
ADP7118
Rev. D Document Feedback
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FEATURES
Low noise: 11 µV rms independent of fixed output voltage
PSRR of 88 dB at 10 kHz, 68 dB at 100 kHz, 50 dB at 1 MHz,
V
OUT
≤ 5 V, V
IN
= 7 V
Input voltage range: 2.7 V to 20 V
Maximum output current: 200 mA
Initial accuracy: ±0.8%
Accuracy over line, load, and temperature
−1.2% to +1.5%, T
J
= −40°C to +85°C
±1.8%, T
J
= −40°C to +125°C
Low dropout voltage: 200 mV (typical) at a 200 mA load,
V
OUT
= 5 V
User programmable soft start (LFCSP and SOIC only)
Low quiescent current, I
GND
= 50 μA (typical) with no load
Low shutdown current: 1.8 μA at V
IN
= 5 V, 3.0 μA at V
IN
= 20 V
Stable with a small 2.2 µF ceramic output capacitor
Fixed output voltage options: 1.8 V, 2.5 V, 3.3 V, 4.5 V, and 5.0 V
16 standard voltages between 1.2 V and 5.0 V are available
Adjustable output from 1.2 V to V
IN
– V
DO
, output can be
adjusted above initial set point
Precision enable
2 mm × 2 mm, 6-lead LFCSP, 8-Lead SOIC, 5-Lead TSOT
APPLICATIONS
Regulation to noise sensitive applications
ADC and DAC circuits, precision amplifiers, power for
VCO V
TUNE
control
Communications and infrastructure
Medical and healthcare
Industrial and instrumentation
Supported by ADIsimPower tool
TYPICAL APPLICATION CIRCUITS
GND
EN SS
VIN VOUT
ADP7118
ON
OFF
V
IN
= 6V
V
OUT
= 5V
SENSE/ADJ
C
IN
2.2µF
C
OUT
2.2µF
C
SS
1nF
11849-001
F
igure 1. ADP7118 with Fixed Output Voltage, 5 V
GND
EN
SS
VIN VOUT
ADP7118
ON
OFF
V
IN
= 7V V
OUT
= 6V
SENSE/ADJ
C
IN
2.2µF
C
OUT
2.2µF
C
SS
1nF
2kΩ
10kΩ
11849-002
Fi
gure 2. ADP7118 with 5 V Output Adjusted to 6 V
GENERAL DESCRIPTION
The ADP7118 is a CMOS, low dropout (LDO) linear regulator
that operates from 2.7 V to 20 V and provides up to 200 mA of
output current. This high input voltage LDO is ideal for the
regulation of high performance analog and mixed-signal circuits
operating from 20 V down to 1.2 V rails. Using an advanced
proprietary architecture, the device provides high power supply
rejection, low noise, and achieves excellent line and load transient
response with a small 2.2 µF ceramic output capacitor. The
ADP7118 regulator output noise is 11 μV rms independent of
the output voltage for the fixed options of 5 V or less.
The ADP7118 is available in 16 fixed output voltage options.
The following voltages are available from stock: 1.2 V (adjustable),
1.8 V, 2.5 V, 3.3 V, 4.5 V, and 5.0 V.
Additional voltages available by special order are 1.5 V, 1.85 V,
2.0 V, 2.2 V, 2.75 V, 2.8 V, 2.85 V, 3.8 V, 4.2 V, and 4.6 V.
Each fixed output voltage can be adjusted above the initial set
point with an external feedback divider. This allows the ADP7118
to provide an output voltage from 1.2 V to V
IN
− V
DO
with high
PSRR and low noise.
User programmable soft start with an external capacitor is
available in the LFCSP and SOIC packages.
The ADP7118 is available in a 6-lead, 2 mm × 2 mm LFCSP
making it not only a very compact solution, but it also provides
excellent thermal performance for applications requiring up to
200 mA of output current in a small, low profile footprint. The
ADP7118 is also available in a 5-lead TSOT and an 8-lead SOIC.
ADP7118 Data Sheet
Rev. D | Page 2 of 23
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Typical Application Circuits ............................................................ 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Input and Output Capacitance, Recommended Specifications ... 4
Absolute Maximum Ratings ............................................................ 5
Thermal Data ................................................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution .................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ...................................................................... 13
Applications Information .............................................................. 14
ADIsimPower Design Tool ....................................................... 14
Capacitor Selection .................................................................... 14
Programable Precision Enable .................................................. 15
Soft Start ...................................................................................... 15
Noise Reduction of the ADP7118 in Adjustable Mode......... 16
Effect of Noise Reduction on Start-Up Time ......................... 16
Current-Limit and Thermal Overload Protection ................. 17
Thermal Considerations ............................................................ 17
Printed Circuit Board Layout Considerations ............................ 20
Outline Dimensions ....................................................................... 22
Ordering Guide .......................................................................... 23
REVISION HISTORY
4/2018—Rev. C to Rev. D
Changes to Features Section............................................................ 1
Updated Outline Dimensions ....................................................... 22
Changes to Ordering Guide .......................................................... 23
11/2016—Rev. B to Rev. C
Changes to Features Section and General Description Section ........ 1
Changes to Ordering Guide ..................................................................... 23
7/2016—Rev. A to Rev. B
Change to Table 5 ............................................................................. 6
Change to Figure 42 ....................................................................... 13
Changes to Programmable Precision Enable Section and Soft
Start Section .................................................................................... 15
Added Effect of Noise Reduction on Start-Up Time Section ... 16
12/2014—Rev. 0 to Rev. A
Changes to Figure 36 to Figure 41 ................................................ 12
Changes to Figure 44 ...................................................................... 14
9/2014—Revision 0: Initial Version