AVX EMI SOLUTIONS
Ron Demcko, Fellow of AVX Corporation
Chris Mello, Principal Engineer, AVX Corporation
Brian Ward, Business Manager, AVX Corporation
Abstract
EMC compatibility is becoming a key design parameter for a most designers of electronic
systems. This paper compares the efficiency and effectiveness of various EMI filter options
available to designers. Integrated Thick Film LC T filters are shown to be a cost effective
method to improve board level EMC performance while shrinking system design size and
keeping costs minimized. A general recap of EMI sources is given as well as a brief recap of
PCB layout and optimization rules.
Introduction
By definition EMC is ability of electronic equipment to operate as designed in its intended
electromagnetic environment without either causing interference to other equipment or suffering
interference from other equipment. As systems shrink in size, become more portable, and more
networked/interconnected, EMC is of huge concern to overall system performance. A system
that has poor EMC capability can easily become ‘locked up’ or even worse can experience
flipped bits thereby generating an erroneous output.
Generally speaking
EMC standards fall into two classifications:
1.
Immunity Standards – these standards define methods and conditions by which
equipment is tested for immunity to unwanted signals. There are many different types of
immunity requirements that a particular PC board or system can be required to meet.
Generally, we can group the requirements to be:
Immunity to transient voltages
Immunity to RF fields of differing magnitude and frequency.
2.
Emission Standards - these standards define the maximum amount of interference or
noise that the equipment under test can generate.
The definition of EMI is any electrical disturbance that interferes with normal operation of
electronic equipment. Sources of EMI include cell phones, computers, transmitters, system
clocks, data lines, oscillators, receiver local oscillators, voltage regulators, power lines, etc.
Broadly speaking, all PCB based high-speed digital signals can be a source of EMI.
Designers that minimize EMI sources within their designs typically create systems that have
relatively good EMC performance. However, even in this case care must be taken to harden
susceptible portions of the design as EMC standards require passing both emissions and
susceptibility performance requirements.
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Meeting International EMC Specification Requirements
One of the first steps towards optimizing a system’s EMC performance and reducing EMI is
through conservative board layout early in the design process. However, in nearly all cases board
optimization cannot eliminate EMI problems. Typically, transient suppression
and EMI filtering
methods must be additionally employed. The rigorous design effort is not lost as board level
transient suppressors and EMI filters (added in the second phase of EMC hardening) are
typically more efficient when used on a board that has gone through some amount of board
layout optimization.
Following these rules typically reduces the magnitude of EMI encountered on a particular
design. An illustration of how these board layout rules could be implemented is shown in Figure
1.
Briefly the top 10 board layout rules are:
1. Use a MultiLayer PCB with large Vcc and Ground planes.
o If this is not possible create a ground grid.
o If this is not feasible connect all grounds to a common point.
2. Use proven Decoupling methods
o Use a high frequency decoupling capacitor at each IC
o Use a high frequency decoupling capacitor at the regulator
o Connect decoupling capacitors in the lowest inductance method possible
o Route power and ground close to one another
3. Keep I/O traces short
o Route I/O traces close to the ground plane
o Place connectors on top of the ground plane
4. Use minimal cable length for connections
5. Terminate high speed lines
6. Shield cables if possible
o Ground both ends of cables
o Consider multiple grounds on a ribbon cable
7. Protect ESD sensitive components with a Transient Voltage Suppressor
o MLVs clamp bi directionally in the on state and like EMI filters in the off state
o Place the MLV as close to the transient source as possible
8. Consider a dedicated Vcc line to clocks
9. Consider limiting the number of 90° trace features. Two 45° trace features typically
radiate less.
10. Use balanced trace design if possible
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