2 Rev 1.1
Table of Contents
1. Related Documents and Conventions ...............................................................................6
1.1. Related Documents........................................................................................................6
1.1.1. Ember EM358x Data Sheet ...................................................................................6
1.1.2. ZigBee Specification..............................................................................................6
1.1.3. ZigBee PRO Stack Profile
.....................................................................................6
1.1.4. ZigBee Stack Profile
..............................................................................................6
1.1.5. Thread Specification..............................................................................................6
1.1.6. Bluetooth Core Specification .................................................................................6
1.1.7. IEEE 802.15.4........................................................................................................6
1.1.8. IEEE 802.11g.........................................................................................................6
1.1.9. USB 2.0 Specification ............................................................................................6
1.1.10.ARM® Cortex™-M3 Reference Manual ................................................................6
1.2. Conventions ...................................................................................................................7
2. ARM® Cortex™-M3 and Memory Modules ......................................................................10
2.1. ARM® Cortex™-M3 Microprocessor............................................................................10
2.2. Embedded Memory ......................................................................................................10
2.2.1. Flash Memory......................................................................................................12
2.2.2. RAM ..................................................................................................................16
2.2.3. Registers..............................................................................................................17
2.3. Memory Protection Unit................................................................................................17
3. Interrupt System ................................................................................................................18
3.1. Nested Vectored Interrupt Controller (NVIC)................................................................18
3.2. Event Manager .............................................................................................................20
3.3. Non-Maskable Interrupt (NMI)......................................................................................23
3.4. Faults............................................................................................................................23
3.5. Registers ......................................................................................................................25
4. Radio Module .....................................................................................................................32
4.1. Receive (RX) Path........................................................................................................32
4.1.1. RX Baseband.......................................................................................................3
2
4.1.2. RSSI and CCA.....................................................................................................3
3
4.2. Transmit (TX) Path .......................................................................................................3
3
4.2.1. TX Baseband.......................................................................................................33
4.2.2. TX_ACTIVE and nTX_ACTIVE Signals...............................................................33
4.3. Calibration ....................................................................................................................33
4.4. Integrated MAC Module ...............................................................................................34
4.5. Packet Trace Interface (PTI) ........................................................................................34
4.6. Random Number Generator.........................................................................................3
4
5. System Modules.................................................................................................................35
5.1. Power Domains ............................................................................................................36
5.1.1. Internally Regulated Power..................................................................................36
5.1.2. Externally Regulated Power ................................................................................3
6
5.2. Resets ..........................................................................................................................37
5.2.1. Reset Sources
.....................................................................................................3
7
5.2.2. Reset Recording ..................................................................................................39