TPN2R503NC
1
MOSFETs Silicon N-channel MOS (U-MOS)
TPN2R503NC
TPN2R503NC
TPN2R503NC
TPN2R503NC
Start of commercial production
2012-11
1.
1.
1.
1. Applications
Applications
Applications
Applications
• Power Management Switches
2.
2.
2.
2. Features
Features
Features
Features
(1) Small footprint due to a small and thin package
(2) Low drain-source on-resistance: R
DS(ON)
= 2.1 mΩ (typ.) (V
GS
= 10 V)
(3) Low leakage current: I
DSS
= 10 µA (max) (V
DS
= 30 V)
(4) Enhancement mode: V
th
= 1.3 to 2.3 V (V
DS
= 10 V, I
D
= 0.5 mA)
3.
3.
3.
3. Packaging and Internal Circuit
Packaging and Internal Circuit
Packaging and Internal Circuit
Packaging and Internal Circuit
TSON Advance
1, 2, 3: Source
4: Gate
5, 6, 7, 8: Drain
2016-05-13
Rev.5.0
©2016 Toshiba Corporation
TPN2R503NC
2
4.
4.
4.
4. Absolute Maximum Ratings (Note) (T
Absolute Maximum Ratings (Note) (T
Absolute Maximum Ratings (Note) (T
Absolute Maximum Ratings (Note) (T
a
a
a
a
= 25
= 25
= 25
= 25
unless otherwise specified)
unless otherwise specified)
unless otherwise specified)
unless otherwise specified)
Characteristics
Drain-source voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulsed)
Power dissipation
Power dissipation
Power dissipation
Single-pulse avalanche energy
Avalanche current
Channel temperature
Storage temperature
(Silicon limit)
(t = 1 ms)
(T
c
= 25)
(t = 10 s)
(t = 10 s)
(Note 1), (Note 2)
(Note 1)
(Note 1)
(Note 3)
(Note 4)
(Note 5)
Symbol
V
DSS
V
GSS
I
D
I
D
I
DP
P
D
P
D
P
D
E
AS
I
AR
T
ch
T
stg
Rating
30
±20
85
40
120
35
1.9
0.7
62
40
150
-55 to 150
Unit
V
A
W
W
W
mJ
A
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
5.
5.
5.
5. Thermal Characteristics
Thermal Characteristics
Thermal Characteristics
Thermal Characteristics
Characteristics
Channel-to-case thermal resistance
Channel-to-ambient thermal resistance
Channel-to-ambient thermal resistance
(T
c
= 25)
(t = 10 s)
(t = 10 s)
(Note 3)
(Note 4)
Symbol
R
th(ch-c)
R
th(ch-a)
R
th(ch-a)
Max
3.57
65.7
178
Unit
/W
/W
/W
Note 1: Ensure that the channel temperature does not exceed 150.
Note 2: Limited by silicon capability. Package limit is 45 A.
Note 3: Device mounted on a glass-epoxy board (a), Figure 5.1
Note 4: Device mounted on a glass-epoxy board (b), Figure 5.2
Note 5: V
DD
= 24 V, T
ch
= 25 (initial), L = 30 µH, R
G
= 1 Ω, I
AR
= 40 A
Fig.
Fig.
Fig.
Fig. 5.1
5.1
5.1
5.1 Device Mounted on a Glass-Epoxy
Device Mounted on a Glass-Epoxy
Device Mounted on a Glass-Epoxy
Device Mounted on a Glass-Epoxy
Board (a)
Board (a)
Board (a)
Board (a)
Fig.
Fig.
Fig.
Fig. 5.2
5.2
5.2
5.2 Device Mounted on a Glass-Epoxy
Device Mounted on a Glass-Epoxy
Device Mounted on a Glass-Epoxy
Device Mounted on a Glass-Epoxy
Board (b)
Board (b)
Board (b)
Board (b)
Note: This transistor is sensitive to electrostatic discharge and should be handled with care.
2016-05-13
Rev.5.0
©2016 Toshiba Corporation