Introductory Invited Paper

Reliability and performance limitations in SiC power devices

Ranbir Singh

GeneSiC Semiconductor Inc., 42652 Jolly Lane, South Riding, VA 20152, United States

Received 25 October 2005

Available online 27 December 2005

Abstract

Despite silicon carbide’s (SiC’s) high breakdown electric ﬁeld, high thermal conductivity and wide bandgap, it faces

certain reliability challenges when used to make conventional power device structures like power MOS-based devices,

bipolar-mode diodes and thyristors, and Schottky contact-based devices operating at high temperatures. The perfor-

mance and reliability issues unique to SiC discussed here include: (a) MOS channel conductance/gate dielectric reliabil-

ity trade-oﬀ due to lower channel mobility as well as SiC–SiO

barrier lowering due to interface traps; (b) reduction in

breakdown ﬁeld and increased leakage current due to material defects; and (c) increased leakage current in SiC Scho-

ttky devices at high temperatures.

Although a natural oxide is considered a signiﬁcant advantage for realizing power MOSFETs and IGBTs in SiC,

devices to date have suﬀered from poor inversion channel mobility. Furthermore, the high interface state density pres-

ently found in the SiC–SiO

system causes the barrier height between SiC and SiO

to be reduced, resulting in increased

carrier injection in the oxide. A survey of alternative dielectrics shows that most suﬀer from an even smaller conduction

band oﬀset at the SiC–dielectric interface than the corresponding Silicon–dielectric interface and have a lower break-

down ﬁeld strength than SiO

. Thus, an attractive solution to reduce tunneling such as stacked dielectrics is required.

In Schottky-based power devices, the reverse leakage currents are dominated by the Schottky barrier height, which is

in the 0.7–1.2 eV range. Because the Schottky leakage current increases with temperature, the SiC Schottky devices have

a reduction in performance at high temperature similar to that of Silcon PN junction-based devices, and they do not

have the high temperature performance beneﬁt associated with the wider bandgap of SiC.

Defects in contemporary SiC wafers and epitaxial layers have also been shown to reduce critical breakdown electric

ﬁeld, result in higher leakage currents, and degrade the on-state performance of devices. These defects include micro-

pipes, dislocations, grain boundaries and epitaxial defects. Optical observation of PN diodes undergoing on-state deg-

radation shows a simultaneous formation of mobile and propagating crystal stacking faults. These faults nucleate at

grain boundaries and permeate throughout the active area of the device, thus degrading device performance after

extended operation.

1. Introduction

Evolutionary improvements in silicon power devices

through better device designs, processing techniques

and material quality have led to great advancements in

power systems in the last four decades. However, many

doi:10.1016/j.microrel.2005.10.013

Tel.: +1 571 265 7535; fax: +1 703 373 6918.

E-mail address: ranbir@ieee.org

Microelectronics Reliability 46 (2006) 713–730

www.elsevier.com/locate/microrel

commercial power devices are now approaching the the-

oretical performance limits oﬀered by the silicon (Si)

material in terms of the capability to block high voltage,

provide low on-state voltage drop, and switch at a high

frequency. Therefore, in the past 5–6 years, many power

system designers have been looking for alternative solu-

tions in order to realize advanced commercial and mili-

tary hardware that requires higher power density circuits

and modules. One of the most promising approaches is

to replace Si as the material of choice for fabrication

of power devices with a wider bandgap material with

acceptable bulk mobility [1]. A revolution is now under-

way to exploit the excellent properties of silicon carbide

(SiC) for the realization of high performance, next gen-

eration power devices. These material properties include:

(a) an order of magnitude higher breakdown electric

ﬁeld; (b) a 3· wider bandgap; and (c) a 3· higher

thermal conductivity than silicon. A high breakdown

electric ﬁeld allows the design of SiC power devices with

thinner and higher doped blocking layers. The large

bandgap of SiC results in a much higher operating tem-

perature and higher radiation hardness. The high ther-

mal conductivity for SiC (4.9 C/W) allows dissipated

heat to be more readily extracted from the device.

Hence, a larger power can be applied to the device for

a given junction temperature. Although many devices

utilizing these beneﬁts have been demonstrated, the long

term reliability issues of various device structures have

received relatively little attention. This paper addresses

the reliability issues faced by contemporary SiC power

devices.

As in Si, SiC power devices may be broadly classiﬁed

into majority carrier devices, which primarily rely on

drift current during on-state conduction; and minority

carrier devices (also called bipolar-type devices), which

result in conductivity modulation during on-state opera-

tion. Majority carrier devices like the Schottky diodes,

power MOSFETs and JFETs oﬀer extremely low

switching power losses because of their high switching

speed. Although the on-state (forward) voltage drop of

majority carrier devices can be low, it becomes prohibi-

tively high at high current densities. This problem expo-

nentially increases in its severity as the voltage rating on

power devices is increased. On the other hand, bipolar-

type devices such as PiN diodes, IGBTs, thyristors, BJTs

and ﬁeld controlled thyristors oﬀer low forward voltage

drops at high current densities, but have higher switch-

ing losses than majority carrier devices. However, SiC

bipolar devices suﬀer from a 4· higher built-in junc-

tion voltage drop as compared to Si devices due to their

larger bandgap resulting in a large forward voltage at

low currents. Although the total on-state drop of SiC

bipolar devices may be lower than Si devices in the

ultra-high voltage regime, their full potential may be dif-

ﬁcult to realize because conventional power device pack-

aging technology can only dissipate 200–300 W/cm

continuously. Since the built-in voltage of 4H-SiC bipo-

lar devices is 2.8 V, the maximum continuous current

may be limited to less than 100–150 A/cm

[2] for bipo-

lar device types which have an odd number of p–n junc-

tions (the built-in potential can cancel in devices with an

even number of junctions).

Numerous SiC majority carrier power devices that

have recently been demonstrated break the ‘silicon theo-

retical limits’ and have led to an acceleration of research

and development activity. Probably the most exciting

event establishing the viability of majority carrier SiC

power devices is the rapid adoption of commercial SiC

Schottky rectiﬁers in the 600 V range [3]. On a 0.64 cm

single chip SiC Schottky diode, a current of 130 A was

demonstrated [4] using micropipe-free regions of a wafer.

Junction barrier Schottky diodes with commercially

attractive current capabilities have been demonstrated

in the 1200–2800 V range [5,6], and may become the next

commercial SiC device type. The power MOSFET in SiC

is a relatively simple device type with excellent prospects

as a candidate to improve and extend the capability of Si

IGBTs in a wide range of applications. Even though the

SiC MOS inversion layer mobility requires much

research, important advances have been demonstrated

in planar MOS devices. These include the demonstration

of 10 V power MOSFETs [7,8] and accumulation mode

MOSFETs (ACCUFET) with a low speciﬁc on-resis-

tance of 15 mX cm

[9]. Another development in MOS-

based power SiC FETs, that has resulted in a device far

exceeding the theoretical performance limitations of Sil-

icon, is the 5 kV SIAFET [10]. The SiC JFET is a major-

ity carrier device type that does not suﬀer from the low

MOS inversion channel mobility and high temperature

gate oxide reliability challenges of the SiC MOSFETs.

The highest voltage SiC-based JFET demonstrated in a

practical circuit includes the 5.5 kV SEJFET [11]. Other

JFETs with commercially relevant capabilities have been

demonstrated with capabilities of 4 A at up to 3.3 kV

[12]. In order to achieve low on-state resistance in JFETs,

researchers have proposed to use a small positive bias on

the gate electrode to aid the JFET channel conductance.

Examples of such eﬀorts are the 5 kV SIJFET [13], 600 V

10 A MOS-enhanced JFET [14], and the 1.7 kV JFET

[15]. A novel approach proposed in the mid-90s [16]

exploits the high voltage advantage of SiC-based JFETs

and the mature fabrication technology and high channel

mobility of a Si MOSFET in a cascode conﬁguration.

The net result is a hybrid device that oﬀers the full func-

tionality of a high voltage power MOSFET [17].

On-state and switching design trade-oﬀs in bipolar

devices are critically dependent on the stored charge.

SiC Bipolar devices have attracted much attention for

high power applications, because SiC bipolar devices

have 30–100· less stored charge, and tolerate a wide

temperature excursion compared to Si bipolar devices

with similar voltage ratings [18]. This is because: (a)

714 R. Singh / Microelectronics Reliability 46 (2006) 713–730