The Customer

IBM has been the bellwether in mainframe computing for more

than 50 years. Today, it continues to lead the way in large-scale

design, creating mainframe computers that employ printed circuit

boards (PCBs) measuring as large as 50cm x 60cm. Unlike bulky

old-fashioned boards, these are enormous conﬁgurations of

super-miniaturized components. A single board can carry tens

of thousands of signal interconnects in more than 10 layers of

circuitry. Adding to this complexity, pin counts reach 5,000 per

component—with many wide buses connecting them—while at

the board level there may be more than 5,000 connections.

The Challenge

While these statistics are impressive, the design challenges that

IBM faces are similar to those faced by any PCB designer. For

example, once a circuit design involves hundreds of signals on a

large bus, traditional schematics can be cumbersome and time-

consuming to work with and analyze.

IBM sought to simplify input and manipulation by developing its

own solution based on entering the design attributes of each signal

in a table or spreadsheet format. However, this created another step

in the process—engineers then had to convert the information into

Hardware Description Language (HDL) to interface with the design

platform. IBM engineers also found they could not treat analog

elements in this way; they still had to conﬁgure them manually.

IBM and Cadence

“The Cadence solution enables us to enter up to 99% of signals in table format, which, along with improved

analytics and a unique integrated environment, reduces our PCB development time by 80%.”

Gisbert Thomke, Group Leader, IBM R&D Lab Germany

Business Challenge

• Shorten time-to-market for mainframe

computer designs requiring highly complex

PCB systems

Design Challenges

• World’s most complex PCBs

• Large designs, multiple wide buses

• High component pin counts and thousands

of board connections

Cadence Solutions

• Allegro System Architect GXL

• Allegro PCB Editor

Results

• Integrated platform—from input to final

design

• Tabular input of signal information for

faster compilations

Cadence is transforming the global electronics industry through a vision called EDA360.

With an application-driven approach to design, our software, hardware, IP, and services help

customers realize silicon, SoCs, and complete systems efﬁciently and proﬁtably. www.cadence.com

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The Solution

When the engineers at IBM R&D Lab Germany learned that Cadence

had developed an integrated solution that managed both tabular

and schematic data in a full design and simulation environment, they

adopted Cadence

Allegro

System Architect GXL.

“Now we can use one design system globally to speed design

iterations—even those spanning from the logical system design

to the physical implementation of the system—with speed and

accuracy. Allegro System Architect is the only product we have

found that offers a totally integrated design system,” explains

Gisbert Thomke, PCB group leader at the IBM R&D Lab Germany.

Speedy Input and Faster Compiles

The primary reason the German IBM lab adopted the Cadence

solution is that it enables designers to enter and manipulate

signal speciﬁcations as easily as with an accounting spread-

sheet. Design teams using the tabular input capability of Allegro

System Architect can complete the input in one-tenth of the time

required to work directly with schematics, and with fewer errors.

Using this method, designers can also output charts and tables

that provide much better analysis for constraint management.

Thomke stresses the importance of this holistic approach: “This

Cadence solution provides us with a far more comprehensive

view of the system structure and greater visibility of the buses,”

he says. “It allows us to forecast the number of layers that will

be required. This is critical for us, because we are working at the

edge of what manufacturing can produce.”

Another major beneﬁt of Allegro System Architect is that compiling

the design code takes a fraction of time previously required for

schematics. The German experts were typically dealing with compi-

lation times in the 8 to 10 hour range, so compiling could only be

performed once a day—usually overnight—and produced up to

400 pages of printout to check. Consequently, a simple typographic

mistake could mean the loss of an entire day in the schedule.

Now, using Allegro System Architect, the IBM development team

can complete compilation in a matter of seconds. This speed

enables engineers to perform incremental compiles for a smaller

number of changes, providing quick detection of errors and

radically increasing efﬁciency and productivity.

Rapid compilations also translate into two additional beneﬁts:

1) companies can meet or beat project schedules; and, 2)

design teams can use the time gained to explore design alterna-

tives, reducing the cost of experimentation and innovation, and

resulting in the best-possible design.

“We used to go through 40 to 50 design iterations over the

entire development cycle,” Thomke says. “Now we can run that

many in a couple of days.”

Front-to-Back Design Environment

The tabular input method is a good example of how the IBM lab

continually develops a variety of methods to improve its design

process. However, they quickly bumped up against the limitations

of this innovation: analog signals still required schematic input,

for example, so the two systems of input had to be merged by

yet another process.

Once the IBM R&D lab in Germany veriﬁed that Allegro System

Architect GXL could meet all of its requirements in a single

integrated software package from beginning to end, it adopted

Cadence as its dedicated design platform for all PCB development.

The integrated environment allows engineers to assess more quickly

and easily how front-end deﬁnitions will affect back-end design

issues. Overall, the improved entry, analytics, and integration have

reduced the time required for PCB development by 80%.

Summary and Future Plans

With Cadence, IBM developed an integrated solution to manage

both tabular and schematic data in a full design and simulation

environment.

The IBM R&D Lab Germany PCB group has used this new

environment to develop several boards, including some very large

designs with many wide buses using Allegro System Architect

software. The German group’s experience has been so positive

that now other divisions of IBM around the world are also moving

to Allegro System Architect for their PCB designs.

Adoption of the new design environment was smooth thanks to

FlowCAD, a Cadence Channel Partner, which provided valuable

support to IBM R&D Lab Germany.

“There was always a quick response from the FlowCAD engineers,

and we had many very useful discussions that helped us to improve

both our design and methodology,” Thomke adds.

“We are proud

to be on the absolute leading edge of PCB technology in terms

of size and complexity. And we are pleased that Cadence is there

with solutions that give us the performance advantage to keep

moving forward.”

The Cadence solution provides us with

a far more comprehensive view of the

system structure.”

“