SSM6L807R
1
MOSFETs Silicon P-/N-Channel MOS
SSM6L807R
SSM6L807R
SSM6L807R
SSM6L807R
Start of commercial production
2018-11
1.
1.
1.
1. Applications
Applications
Applications
Applications
• Power Management Switches
2.
2.
2.
2. Features
Features
Features
Features
(1) Low drain-source on-resistance
Q1 N-channel:
R
DS(ON)
= 39.1 mΩ (max) (@V
GS
= 4.5 V)
R
DS(ON)
= 53 mΩ (max) (@V
GS
= 2.5 V)
R
DS(ON)
= 82 mΩ (max) (@V
GS
= 1.8 V)
Q2 P-channel:
R
DS(ON)
= 45 mΩ (max) (@V
GS
= -10 V)
R
DS(ON)
= 56 mΩ (max) (@V
GS
= -4.5 V)
R
DS(ON)
= 76 mΩ (max) (@V
GS
= -2.5 V)
R
DS(ON)
= 157 mΩ (max) (@V
GS
= -1.8 V)
3.
3.
3.
3. Packaging and Internal Circuit
Packaging and Internal Circuit
Packaging and Internal Circuit
Packaging and Internal Circuit
TSOP6F
1: Source 1
2: Gate 1
3: Drain 2
4: Source 2
5: Gate 2
6: Drain 1
2019-01-31
Rev.3.0
©2018-2019
Toshiba Electronic Devices & Storage Corporation
SSM6L807R
2
4.
4.
4.
4. Absolute Maximum Ratings (Note)
Absolute Maximum Ratings (Note)
Absolute Maximum Ratings (Note)
Absolute Maximum Ratings (Note)
4.1.
4.1.
4.1.
4.1. Q1 Absolute Maximum Ratings (Unless otherwise specified, T
Q1 Absolute Maximum Ratings (Unless otherwise specified, T
Q1 Absolute Maximum Ratings (Unless otherwise specified, T
Q1 Absolute Maximum Ratings (Unless otherwise specified, T
a
a
a
a
= 25
= 25
= 25
= 25
)
)
)
)
Characteristics
Drain-source voltage
Gate-source voltage
Drain current (DC)
Drain current (pulsed)
(Note 3)
(Note 1)
(Note 1), (Note 2)
Symbol
V
DSS
V
GSS
I
D
I
DP
Rating
30
±12
4
10
Unit
V
V
A
Note 1: Ensure that the channel temperature does not exceed 150 .
Note 2: Pulse width (PW) ≤ 10 ms, duty ≤ 1 %
Note 3: Reverse bias between gate and source is guaranteed with pulse rating.
4.2.
4.2.
4.2.
4.2. Q2 Absolute Maximum Ratings (Unless otherwise specified, T
Q2 Absolute Maximum Ratings (Unless otherwise specified, T
Q2 Absolute Maximum Ratings (Unless otherwise specified, T
Q2 Absolute Maximum Ratings (Unless otherwise specified, T
a
a
a
a
= 25
= 25
= 25
= 25
)
)
)
)
Characteristics
Drain-source voltage
Gate-source voltage
Drain current (DC)
Drain current (pulsed)
(Note 3)
(Note 1)
(Note 1), (Note 2)
Symbol
V
DSS
V
GSS
I
D
I
DP
Rating
-20
±12
-4
-10
Unit
V
V
A
Note 1: Ensure that the channel temperature does not exceed 150 .
Note 2: Pulse width (PW) ≤ 10 ms, duty ≤ 1 %
Note 3: Reverse bias between gate and source is guaranteed with pulse rating.
4.3.
4.3.
4.3.
4.3. Absolute Maximum Ratings (Unless otherwise specified, T
Absolute Maximum Ratings (Unless otherwise specified, T
Absolute Maximum Ratings (Unless otherwise specified, T
Absolute Maximum Ratings (Unless otherwise specified, T
a
a
a
a
= 25
= 25
= 25
= 25
)
)
)
)
(Q1, Q2 Common)
(Q1, Q2 Common)
(Q1, Q2 Common)
(Q1, Q2 Common)
Characteristics
Power dissipation
Power dissipation
Channel temperature
Storage temperature
t ≤ 10 s
(Note 1)
(Note 1)
Symbol
P
D
T
ch
T
stg
Rating
1.4
1.8
150
-55 to 150
Unit
W
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Note 1: Device mounted on an FR4 board.(total rating)
(25.4 mm × 25.4 mm × 1.6 mm, Cu pad: 645 mm
2
)
Note: The MOSFETs in this device are sensitive to electrostatic discharge. When handling this device, the worktables,
operators, soldering irons and other objects should be protected against anti-static discharge.
Note: The channel-to-ambient thermal resistance, R
th(ch-a)
, and the drain power dissipation, P
D
, vary according to
the board material, board area, board thickness and pad area. When using this device, be sure to take heat
dissipation fully into account.
2019-01-31
Rev.3.0
©2018-2019
Toshiba Electronic Devices & Storage Corporation