2015-2018 Microchip Technology Inc. DS60001320E-page 1
PIC32MZ Embedded Connectivity
with Floating Point Unit (EF) Family
Operating Conditions
2.1V to 3.6V, -40ºC to +85ºC, DC to 252 MHz
2.1V to 3.6V, -40ºC to +125ºC, DC to 180 MHz
Core: 252 MHz (up to 415 DMIPS) M-Class
16 KB I-Cache, 4 KB D-Cache
FPU for 32-bit and 64-bit floating point math
MMU for optimum embedded OS execution
microMIPS™ mode for up to 35% smaller code size
DSP-enhanced core:
- Four 64-bit accumulators
- Single-cycle MAC, saturating, and fractional math
- IEEE 754-compliant
Code-efficient (C and Assembly) architecture
Clock Management
Programmable PLLs and oscillator clock sources
Fail-Safe Clock Monitor (FSCM)
Independent Watchdog Timers (WDT) and Deadman
Timer (DMT)
Fast wake-up and start-up
Pow er Ma nag em ent
Low-power modes (Sleep and Idle)
Integrated Power-on Reset (POR) and Brown-out Reset
(BOR)
Memory Interfaces
50 MHz External Bus Interface (EBI)
50 MHz Serial Quad Interface (SQI)
Audio and Graphics Interfaces
Graphics interfaces: EBI or PMP
Audio data communication: I
2
S, LJ, and RJ
Audio control interfaces: SPI and I
2
C
Audio master clock: Fractional clock frequencies with USB
synchronization
High-Speed (HS) Communication Interfaces
(with Dedicated DMA)
USB 2.0-compliant Hi-Speed On-The-Go (OTG) controller
10/100 Mbps Ethernet MAC with MII and RMII interface
Security Features
Crypto Engine with RNG for data encryption/decryption and
authentication (AES, 3DES, SHA, MD5, and HMAC)
Advanced memory protection:
- Peripheral and memory region access control
Direct Memory Access (DMA)
Eight channels with automatic data size detection
Programmable Cyclic Redundancy Check (CRC)
Advanced Analog Features
12-bit ADC module:
- 18 Msps with up to six Sample and Hold (S&H) circuits
(five dedicated and one shared)
- Up to 48 analog inputs
- Can operate during Sleep and Idle modes
- Multiple trigger sources
- Six Digital Comparators and six Digital Filters
Two comparators with 32 programmable voltage
references
Temperature sensor with ±2ºC accuracy
Communication Interfaces
Two CAN modules (with dedicated DMA channels):
- 2.0B Active with DeviceNet™ addressing support
Six UART modules (25 Mbps):
- Supports up to LIN 2.1 and IrDA
®
protocols
Six 4-wire SPI modules (up to 50 MHz)
SQI configurable as an additional SPI module (50 MHz)
•Five I
2
C modules (up to 1 Mbaud) with SMBus support
Parallel Master Port (PMP)
Peripheral Pin Select (PPS) to enable function remap
Timers/Output Compare/Input Capture
Nine 16-bit or up to four 32-bit timers/counters
Nine Output Compare (OC) modules
Nine Input Capture (IC) modules
Real-Time Clock and Calendar (RTCC) module
Input/Output
5V-tolerant pins with up to 32 mA source/sink
Selectable open drain, pull-ups, pull-downs, and slew rate
controls
External interrupts on all I/O pins
PPS to enable function remap
Qualification and Class B Support
AEC-Q100 REVH (Grade 1 -40ºC to +125ºC)
Class B Safety Library, IEC 60730 (planned)
Back-up internal oscillator
Debugger Development Support
In-circuit and in-application programming
•4-wire MIPS
®
Enhanced JTAG interface
Unlimited software and 12 complex breakpoints
IEEE 1149.2-compatible (JTAG) boundary scan
Non-intrusive hardware-based instruction trace
Software and T ools Support
C/C++ compiler with native DSP/fractional and FPU support
•MPLAB
®
Harmony Integrated Software Framework
TCP/IP, USB, Graphics, and mTouch™ middleware
MFi, Android™, and Bluetooth
®
audio frameworks
RTOS Kernels: Express Logic ThreadX, FreeRTOS™,
OPENRTOS
®
, Micriµm
®
µC/OS™, and SEGGER embOS
®
Packages
Type QFN TQFP
TFBGA
VTLA LQFP
Pin Count 64 64 100 144 100
(1)
144 124 144
I/O Pins (up to) 53 53 78 120 78 120 98 120
Contact/Lead Pitch 0.50 mm 0.50 mm 0.40 mm 0.50 mm 0.40 mm 0.65 mm 0.50 mm 0.50 mm 0.50 mm
Dimensions 9x9x0.9 mm 10x10x1 mm 12x12x1 mm 14x14x1 mm 16x16x1 mm 7x7x1.2 mm 7x7x1.2 mm 9x9x0.9 mm 20x20x1.40 mm
Note 1: Contact your local Microchip Sales Office for information on the availability of devices in the 100-pin TFBGA packages
32-bit MCUs (up to 2 MB Live-Update Flash and 512 KB SRAM) with FPU,
Audio and Graphics Interfaces, HS USB, Ethernet, and Advanced Analog
PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family
DS60001320E-page 2 2015-2018 Microchip Technology Inc.
TABLE 1: PIC32MZ EF FAMILY FEATURES
Device
Program
Memory (KB)
Data
Memory (KB)
Pins
Packages
Boot Flash
Memory (KB)
Remappable Peripherals
Crypto
RNG
DMA Channels
(Programmable/
Dedicated)
ADC (Channels)
Analog Comparators
USB 2.0 HS OTG
I
2
C
PMP
EBI
SQI
RTCC
Ethernet
I/O Pins
JTAG
Trace
Remappable Pins
Timers/
Capture/
Compare
(1)
UART
SPI/I
2
S
External
Interrupts
(2)
CAN 2.0B
PIC32MZ0512EFE064
512 128
64
TQFP,
QFN
160 34 9/9/9 6 4 5
0NY8/12
24 2 Y 4 Y N Y Y Y 46 Y Y
PIC32MZ0512EFF064 2NY8/16
PIC32MZ0512EFK064 2YY8/18
PIC32MZ1024EFE064
1024
0NY8/12
PIC32MZ1024EFF064 256 2 N Y 8/16
PIC32MZ1024EFK064 2YY8/18
PIC32MZ0512EFE100
512 128
100 TQFP 160 51 9/9/9 6 6 5
0NY8/12
40 2 Y 5 Y Y Y Y Y 78 Y Y
PIC32MZ0512EFF100 2NY8/16
PIC32MZ0512EFK100 2YY8/18
PIC32MZ1024EFE100
1024
0NY8/12
PIC32MZ1024EFF100 256 2 N Y 8/16
PIC32MZ1024EFK100 2YY8/18
PIC32MZ0512EFE124
512 128
124 VTLA 160 53 9/9/9 6 6 5
0NY8/12
48 2 Y 5 Y Y Y Y Y 97 Y Y
PIC32MZ0512EFF124 2NY8/16
PIC32MZ0512EFK124 2YY8/18
PIC32MZ1024EFE124
1024
0NY8/12
PIC32MZ1024EFF124 256 2 N Y 8/16
PIC32MZ1024EFK124 2YY8/18
PIC32MZ0512EFE144
512 128
144
LQFP,
TQFP,
TFBGA
160 53 9/9/9 6 6 5
0NY8/12
48 2 Y 5 Y Y Y Y Y 120 Y Y
PIC32MZ0512EFF144 2NY8/16
PIC32MZ0512EFK144 2YY8/18
PIC32MZ1024EFE144
1024 256
0NY8/12
PIC32MZ1024EFF144 2NY8/16
PIC32MZ1024EFK144 2YY8/18
Note 1: Eight out of nine timers are remappable.
2: Four out of five external interrupts are remappable.
3: This device is available with a 252 MHz speed rating.