2007-2018 Microchip Technology Inc. DS60001145V-page 1
PIC32
1.0 DEVICE OVERVIEW
This document defines the Flash programming
specification for the PIC32 family of 32-bit
microcontrollers.
This programming specification is designed to guide
developers of external programmer tools. Customers
who are developing applications for PIC32 devices
should use development tools that already provide
support for device programming.
The major topics of discussion include:
Section 1.0 “Device Overview”
Section 2.0 “Programming Overview”
Section 3.0 “Programming Steps”
Section 4.0 “Connecting to the Device”
Section 5.0 “EJTAG vs. ICSP”
Section 6.0 “Pseudo Operations”
Section 7.0 “Entering 2-Wire Enhanced ICSP
Mode”
Section 8.0 “Check Device Status”
Section 9.0 “Erasing the Device”
Section 10.0 “Entering Serial Execution Mode”
Section 11.0 “Downloading the Programming
Executive (PE)”
Section 12.0 “Downloading a Data Block”
Section 13.0 “Initiating a Page Erase”
Section 14.0 “Initiating a Flash Row Write”
Section 15.0 “Verify Device Memory
Section 16.0 “Exiting Programming Mode”
Section 17.0 “The Programming Executive”
Section 18.0 “Checksum”
Section 19.0 “Con figurat ion Memory and Device
ID”
Section 20.0 “TAP Controllers”
Section 21.0 “AC /DC Char acterist ics and Timing
Requirements”
Appendix A: “PIC32 Flash Memory Map”
Appendix B: “Hex File Format”
Appendix C: “Device IDs”
Appendix D: “Revision History”
2.0 PROGRAMMING OVERVIEW
When in development of a programming tool, it is
necessary to understand the internal Flash program
operations of the target device and the Special
Function Registers (SFRs) used to control Flash
programming, as these same operations and registers
are used by an external programming tool and its
software. These operations and control registers are
describ ed in the “Flash Program Memory” chapter i n
the specific device data sheet, and the related “PIC32
Family Reference Manual” section. It is highly
recommended that these documents be used in
conjunction with this programming specification.
An external tool programming setup consists of an
external programmer tool and a target PIC32 device.
Figure 2-1 ill ustrate s a typi cal prog rammi ng setu p. Th e
programmer tool is responsible for executing
necessary programming steps and completing the
programming operation.
FIGURE 2-1: PROGRAMMING SYSTEM
SETUP
Target PIC32 Device
CPU
On-Chip Memory
External
Programmer
PIC32 Flash Programming Specification
PIC32
DS60001145V-page 2 2007-2018 Microchip Technology Inc.
2.1 Devices with Dual Flash Panel and
Dual Boot Regions
The PIC32MKXXXXXXD/E/F/K/L/M and PIC32MZ
families of devices incorporate several features useful
for field (self) programming of the device. These
features include dual Flash panels with dual boot
regions, an aliasing scheme for the boot regions
allowing automatic selection of boot code at start-up
and a panel swap feature for Program Flash. The two
Flash panels and their associated boot regions can be
erased and programmed separately. Refer to the
Section 48. “Memory Organization and
Permissions (DS60001214) of the “PIC32 Family
Refe renc e Manua l” for a detailed explanation of these
features.
A development tool used for production programming
will not be con cerned about most of these fea tures with
the following exceptions:
Ensuring the S WAP bit (NVMCON< 7>) is in the
proper setting. The default setting is ‘0’ for no swap
of pane ls. T he developm ent tool should as sume the
default setting when generating source files for the
programming tool.
Proper handling of the aliasing of the boot memory
in the checksum calculation. The aliased sections
will be duplicates of the fixed sections. See
Section 18.0 “Che cks um” for mo re inf orm ati on on
checksum calculations with aliased regions
For PIC32MK devices, using the Erase/Retry
featur e when an attem pt to era se a Fla sh page fai ls
and needs to be r etried. See Section 13.0
“Initiating a Page Erase” for more information.
2.2 Programming Interfaces
All PIC32 devices provide two physical interf aces to the
external programmer tool:
2-wire In-Circuit Serial Programming™ (ICSP™)
4-wire Joint Test Action Group (JTAG)
See Section 4.0 “Connecting to the Device” for
more information.
Either of these methods may use a downloadable
Programming Executive (PE). The PE executes from
the target device RAM and hides device programming
details from the prog rammer. It also remov es overhea d
associated with data transfer and improves overall data
throughput. Microchip has developed a PE that is
available for use with any external programmer, see
Section 17.0 “The Programming Executive” for
more information.
Section 3.0 “Programming Steps” describes high-
level programming steps, followed by a brief
explanation of each step. Detailed explanations are
available in corresponding sections of this document.
More info rmation on p rogramming c ommands, EJTA G,
and DC specifications are available in the following
sections:
Section 19.0 “Configuration Memory and
Device ID”
Section 20.0 “TAP Controllers”
Section 21.0 “AC/DC Characteristics and
Timi ng Requiremen ts”
2.3 Enhanced JTAG (EJTAG)
The 2-wire and 4-wire interfaces use the EJTAG
protocol to exchange data with the programmer. While
this document provides a working description of this
protocol as needed, advanced users are advised to
refer to the Imagination Technologies Limited web site
(www.imgtec.com) for more information.
2.4 Data Sizes
Data sizes are defined as follows:
One word: 32 bits
One-half word: 16 bits
One-qua rter word: 8 bits
One Byte: 8 bits