PIC32
DS60001145V-page 2 2007-2018 Microchip Technology Inc.
2.1 Devices with Dual Flash Panel and
Dual Boot Regions
The PIC32MKXXXXXXD/E/F/K/L/M and PIC32MZ
families of devices incorporate several features useful
for field (self) programming of the device. These
features include dual Flash panels with dual boot
regions, an aliasing scheme for the boot regions
allowing automatic selection of boot code at start-up
and a panel swap feature for Program Flash. The two
Flash panels and their associated boot regions can be
erased and programmed separately. Refer to the
Section 48. “Memory Organization and
Permissions” (DS60001214) of the “PIC32 Family
Refe renc e Manua l” for a detailed explanation of these
features.
A development tool used for production programming
will not be con cerned about most of these fea tures with
the following exceptions:
• Ensuring the S WAP bit (NVMCON< 7>) is in the
proper setting. The default setting is ‘0’ for no swap
of pane ls. T he developm ent tool should as sume the
default setting when generating source files for the
programming tool.
• Proper handling of the aliasing of the boot memory
in the checksum calculation. The aliased sections
will be duplicates of the fixed sections. See
Section 18.0 “Che cks um” for mo re inf orm ati on on
checksum calculations with aliased regions
• For PIC32MK devices, using the Erase/Retry
featur e when an attem pt to era se a Fla sh page fai ls
and needs to be r etried. See Section 13.0
“Initiating a Page Erase” for more information.
2.2 Programming Interfaces
All PIC32 devices provide two physical interf aces to the
external programmer tool:
• 2-wire In-Circuit Serial Programming™ (ICSP™)
• 4-wire Joint Test Action Group (JTAG)
See Section 4.0 “Connecting to the Device” for
more information.
Either of these methods may use a downloadable
Programming Executive (PE). The PE executes from
the target device RAM and hides device programming
details from the prog rammer. It also remov es overhea d
associated with data transfer and improves overall data
throughput. Microchip has developed a PE that is
available for use with any external programmer, see
Section 17.0 “The Programming Executive” for
more information.
Section 3.0 “Programming Steps” describes high-
level programming steps, followed by a brief
explanation of each step. Detailed explanations are
available in corresponding sections of this document.
More info rmation on p rogramming c ommands, EJTA G,
and DC specifications are available in the following
sections:
• Section 19.0 “Configuration Memory and
Device ID”
• Section 20.0 “TAP Controllers”
• Section 21.0 “AC/DC Characteristics and
Timi ng Requiremen ts”
2.3 Enhanced JTAG (EJTAG)
The 2-wire and 4-wire interfaces use the EJTAG
protocol to exchange data with the programmer. While
this document provides a working description of this
protocol as needed, advanced users are advised to
refer to the Imagination Technologies Limited web site
(www.imgtec.com) for more information.
2.4 Data Sizes
Data sizes are defined as follows:
• One word: 32 bits
• One-half word: 16 bits
• One-qua rter word: 8 bits
• One Byte: 8 bits