24-Bit, 625 kSPS, 109 dB Sigma-Delta
ADC with On-Chip Buffers, Serial Interface
Data Sheet
AD7763
Rev. B Document Feedback
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FEATURES
120 dB dynamic range at 78 kHz output data rate
109 dB dynamic range at 625 kHz output data rate
112 dB SNR at 78 kHz output data rate
107 dB SNR at 625 kHz output data rate
625 kHz maximum fully filtered output word rate
Programmable oversampling rate (32× to 256×)
Flexible serial interface
Fully differential modulator input
On-chip differential amplifier for signal buffering
Low-pass finite impulse response (FIR) filter with default
or user-programmable coefficients
Overrange alert bit
Digital offset and gain correction registers
Low power and power-down modes
Synchronization of multiple devices via
SYNC
pin
I
2
S interface mode
APPLICATIONS
Data acquisition systems
Vibration analysis
Instrumentation
FUNCTIONAL BLOCK DIAGRAM
05476-001
AD7763
V
IN+
V
IN–
AV
DD1
AGND
MCLK
DGND
V
DRIVE
AV
DD2
AV
DD3
AV
DD4
DV
DD
DECAPA
R
BIAS
DECAPB
MCLKGND
SYNC
RESET
SH2:0
ADR2:0
CDIV
I
2
S
SCP
SCR
SDL
DRDY
SCO
FSO
SDO
SDI
FSI
CONTROL LOGIC
I/O
OFFS E T AND GAIN
REGISTERS
DIFF
MULTIBIT
-
MODULATOR
RECONSTRUCTION
V
REF+
REFGND
FIR FILTER
ENGINE
PROGRAMMABLE
DECIMATION
BUF
Figure 1.
GENERAL DESCRIPTION
The AD7763 high performance, 24-bit, Σ-Δ analog-to-digital
converter (ADC) combines wide input bandwidth and high
speed with the benefits of Σ-Δ conversion, as well as performance
of 107 dB SNR at 625 kSPS, making it ideal for high speed data
acquisition. A wide dynamic range, combined with significantly
reduced antialiasing requirements, simplifies the design process.
An integrated buffer to drive the reference, a differential ampli-
fier for signal buffering and level shifting, an overrange flag,
internal gain and offset registers, and a low-pass, digital FIR
filter make the AD7763 a compact, highly integrated data
acquisition device requiring minimal peripheral component
selection. In addition, the device offers programmable
decimation rates and a digital FIR filter, which can be user-
programmed to ensure that its characteristics are tailored for the
user’s application. The AD7763 is ideal for applications demanding
high SNR without necessitating the design of complex, front-
end signal processing.
The differential input is sampled at up to 40 MSPS by an analog
modulator. The modulator output is processed by a series of
low-pass filters, the final filter having default or user-programmable
coefficients. The sample rate, filter corner frequencies, and
output word rate are set by a combination of the external clock
frequency and the configuration registers of the AD7763.
The reference voltage supplied to the AD7763 determines the
analog input range. With a 4 V reference, the analog input range
is ±3.2 V differential-biased around a common mode of 2 V.
This common-mode biasing can be achieved using the on-chip
differential amplifiers, further reducing the external signal
conditioning requirements.
The AD7763 is available in an exposed paddle, 64-lead TQFP_EP
and is specified over the industrial temperature range from
−40°C to +85°C.
Table 1. Related Devices
Part No. Description
AD7760 24-bit, 2.5 MSPS, 100 dB Σ-Δ, parallel interface
AD7762 24-bit, 625 kSPS, 109 dB Σ-Δ, parallel interface
AD7763 Data Sheet
Rev. B | Page 2 of 32
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Timing Specifications ....................................................................... 5
Timing Diagrams .......................................................................... 6
Absolute Maximum Ratings ............................................................ 7
ESD Caution .................................................................................. 7
Pin Configuration and Function Descriptions ............................. 8
Terminology .................................................................................... 10
Typical Performance Characteristics ........................................... 11
Theory of Operation ...................................................................... 14
AD7763 Interface ............................................................................ 15
Reading Data Using the SPI Interface ..................................... 15
Synchronization .......................................................................... 15
Sharing the Serial Bus ................................................................ 15
Writing to the AD7763 .............................................................. 16
Reading Status and Other Registers ......................................... 17
Reading Data Using the I
2
S Interface ....................................... 18
Clocking the AD7763 ..................................................................... 19
Example 1 .................................................................................... 19
Example 2 .................................................................................... 19
Driving the AD7763 ....................................................................... 20
Using the AD7763 ...................................................................... 21
Bias Resistor Selection ............................................................... 21
Decoupling and Layout Recommendations................................ 22
Supply Decoupling ..................................................................... 23
Additional Decoupling .............................................................. 23
Reference Voltage Filtering ....................................................... 23
Differential Amplifier Components ........................................ 23
Exposed Paddle ........................................................................... 23
Layout Considerations ............................................................... 23
Programmable FIR Filter ............................................................... 24
Downloading a User-Defined Filter ............................................ 25
Example Filter Download ......................................................... 26
Registers ........................................................................................... 27
Control Register 1—Address 0x001 ......................................... 27
Control Register 2—Address 0x002 ......................................... 27
Status Register (Read Only) ...................................................... 28
Offset Register—Address 0x003 ............................................... 28
Gain Register—Address 0x004 ................................................. 28
Overrange Register—Address 0x005 ....................................... 28
Outline Dimensions ....................................................................... 29
Ordering Guide .......................................................................... 29
REVISION HISTORY
1/14—Rev. A to Rev. B
Added Exposed Pad Notation, Figure 4 and Table 5 ................... 8
Change to Figure 37 ....................................................................... 24
Updated Outline Dimensions ....................................................... 29
11/09—Rev. 0 to Rev. A
Changes to Figure 5 ........................................................................... 8
Changes to Sharing the Serial Bus Section ................................. 15
Changes to Figure 26 ...................................................................... 16
Updated Outline Dimensions ....................................................... 29
Changes to Ordering Guide .......................................................... 29
10/05—Revision 0: Initial Version