QUALIFICATION REPORT

EPC Reliability & Quality

EPC GaN® FET

Automotive Qualication

EPC2214

EFFICIENT POWER CONVERSION

Part

Number

Max

(V)

Max

(V)

Max

DS(on)

(mΩ)

Die Size

(mm x mm)

Max Operating

Temperature

(°C)

EPC2214 80 6 20 S (1.35 x 1.35) 150

EPC2206 80 6 2.2 XL (6.05 x 2.30) 150

EPC2212 100 6 13.5 M (2.11 x 1.63) 150

EPC 2202 80 5.75 17 M (2.11 x 1.63) 150

EPC2203 80 5.75 80 S (0.95 x 0.95) 150

This report summarizes the Product Qualication results for

EPC part number EPC2214. The EPC2214 meets all required

qualication requirements and is released for production.

Qualication Test Overview

EPC’s EPC2214, EPC2206, EPC2202, EPC2203 and EPC2212 eGaN

FETs were subjected to a wide variety of stress tests following the

specications of AEC-Q101 (Rev D1) developed for silicon-based power

MOSFETs. These tests include:

– Preconditioning: Parts undergo the following steps in sequence:

(1) 125°C bake for a minimum of 24 hours; (2) Moisture Sensitivity

Level 1 (MSL1); (3) 3 times reow.

– Parametric Verication: Device parameters are measured at -40°C,

25°C, and 150°C to ensure compliance with datasheet limits over the

entire temperature range.

– Electrostatic Discharge (ESD) Characterization: Parts are tested under

both Human Body Model (HBM) and Charged Device Model (CDM)

to assess device susceptibility to electrostatic discharge events.

Scope

The testing matrix in this report covers the quali��cation of EPC2214 in

accordance with the component level AEC-Q101 Rev D1 requirements.

For some of the required tests, EPC2214 is qualied by matrix with EPC2206,

EPC2202, EPC2203, and EPC2212, also AEC qualied products within the

same device family. All ve of these automotive devices are compared in

the table below.

– High temperature reverse bias (HTRB): Parts are subjected to a drain-

source voltage at the maximum rated temperature and maximum

rated voltage.

– High temperature gate bias (HTGB): Parts are subjected to a gate-

source voltage at the maximum rated temperature and maximum

rated gate voltage.

– Unbiased highly accelerated test (uHAST): Parts are stressed in a

non-condensing humid environment for 96 hours at 130°C, 85%

humidity, and vapor pressure 33.3 psia.

– Temperature cycling (TC): Parts are subjected to alternating high

and low temperature extremes from -55°C to 150°C for a total of

1000 cycles

– High temperature high humidity reverse bias (H3TRB): Parts are

subjected to 1000 hours of 85°C, 85% humidity with the drain biased

at 80% of maximum rating.

– Moisture sensitivity level 1 (MSL1): Parts are subjected to moisture,

temperature, and three cycles of reow. MSL1 is the most stringent

of the moisture sensitivity levels, requiring 85°C and 85% humidity

for 168 hours.

– Intermittent Operating Life (IOL): Parts are temperature cycled with

short period and device heating through internal electrical power

dissipation.

– Destructive Physical Analysis: Parts are delayered and physically

analyzed looking for defects resulting from stress testing.

All devices put on test as part of this qualication underwent external

visual inspection prior to test. This microscope inspection checks for

physical damage to the chip-scale package, such as edge chipping

or cracks, that may have resulted from assembly or transit. Damaged

parts are removed from the test population.

For all qualication tests, the stability of the devices is veried with

DC electrical tests before and after stress. In many cases, interim

readouts are also performed. Electrical parameters are measured at

room temperature. The parameters include: gate-source threshold

voltage (V

), on-state resistance R

DS(on)

, o-state drain leakage

DSS

), and gate leakage (I

GSS

). For V

and R

DS(on)

, a failure is recorded

Robert Strittmatter, Director of Engineering, Efficient Power Conversion Corporation

QUALIFICATION REPORT

EPC Reliability & Quality

Stress Test Part Number

Voltage

(V)

Die Size

(mm x mm)

Test Condition # of Failure

Sample Size

(unit x lot)

Duration

(Hrs)

HTRB EPC2214 80 S (1.35 x 1.35) T = 150

C, V

= 80 V 0 77 x 1 1000

HTRB EPC2206 80 XL (6.05 x 2.30) T = 150

C, V

= 80 V 0 77 x 3 1000

HTRB EPC2212 100 M (2.11 x 1.63) T = 150

C, V

= 100 V 0 77 x 3 1000

HTRB EPC2202 80 M (2.11 x 1.63) T = 150

C, V

= 80 V 0 77 x 3 1000

HTRB EPC2203 80 S (0.95 x 0.95) T = 150

C, V

= 80 V 0 77 x 3 1000

Table 1. High Temperature Reverse Bias Test

High Temperature Reverse Bias

Parts were subjected to 100% of the rated drain-source voltage at the maximum rated temperature (150°C) for a stress period of 1000 hours.

As shown in Table 1 below, one lot of EPC2214 was stressed at 150°C for 1000 hours. This, in conjunction with the matrix of HTRB results from other

in-family AEC products, satises AEC-Q101 requirements for a 80 V 150°C rating.

Parts were mounted on high Tg FR-4 adapter cards. Testing was conducted in accordance with MIL-STD-750-1 (M1038 Method A). This standard

requires the parts to be under bias during temperature ramp up and cool down. In addition, post-screening must occur within 24 hours after bias

has been removed.

when either of the following occurs: (i) the measurement exceeds the

datasheet specications; or (2) the measurement has changed by more

than 20% of its initial value. For I

DSS

and I

GSS

, a failure is recorded if the

measurement exceeds datasheet limit, or if it has increased by more

than 5x during test. All testing requirements and specications for

AEC-Q101 (Rev D1) were followed.

For certain qualication tests, parts were mounted onto high Tg

FR-4 (FR-5 or NP-175) or polyimide (Arlon 85NT) PCB adaptor cards.

These cards simplify the process of post-screening and electrically

stressing the parts. Adaptor cards (1.6 mm in thickness) with two

copper layers were used. The top copper layer was 1 oz. or 2 oz., and

the bottom copper layer was 1 oz. Kester NXG1 type 3 SAC305 solder

no clean ux was used in mounting the part onto an adaptor card. After

assembly, parts were either baked or ux-cleaned.

For other qualications tests, including MSL1 and TC, parts were not

mounted to adaptor cards. Electrical tests were performed using probe

needles touching the solder pads of the bare die.

While the AEC-Q101 standard was developed for silicon devices, many

of the environmental reliability tests apply directly to EPC’s eGaN FETs

for the following reasons:

1) eGaN devices consist of a very thin lm of GaN/AlGaN grown on a

standard silicon substrate. Thermo-mechanically, they behave the

same as a standard silicon die.

2) eGaN devices are fabricated using mostly standard processes in a

silicon CMOS foundry. These include internal metal layers, dielectric

layers, vias, passivation, and bump processes.

For tests such as HTRB and HTGB, the distinct physics of failure of eGaN

compared to MOSFETs requires further study in order to condently

project service life based on 1000 hours of accelerated stress testing.

In these cases, EPC takes a three-prong approach to help automotive

customers gain condence the needs of their mission prole will be

met:

1) EPC conducts standard AEC-Q101 qualication of eGaN FETs,

following all requirements and standards exactly. This establishes

a reliability baseline.

2) EPC conducts traditional accelerated voltage/temperature testing,

which gives lifetime extrapolations under ordinary use conditions

resulting from intrinsic failure mechanisms. Accelerated test results

are available on the EPC website.

3) EPC conducts additional operating life testing in test circuits that

emulate the stress conditions seen in the application environment.

Examples include both LIDAR and dc-dc conversion. These tests

are often designed and implemented in cooperation with the end-

users. The tests are designed to directly verify that the service life of

the eGaN product will exceed mission requirements (typically 10-15

years of continuous operation).