© July 2009 Altera Corporation Stratix III Device Family Errata Sheet
ES-01026-7.3
Errata Sheet
© July 2009
Stratix III Device Family
Errata Sheet
Introduction
This errata sheet provides updated information on known device issues affecting
Stratix
®
III devices.
Table 1 shows the specific issues and which Stratix III devices are affected by each
issue.
Table 1. Stratix III Family Issues (Part 1 of 2)
Issue Affected Devices Fixed Devices
Error Detection CRC feature, when enabled, may cause the MLAB
RAM blocks to operate incorrectly.
All Stratix III Devices —
Remote System Upgrade feature fails when loading an invalid
application configuration image.
All Stratix III Devices —
The CRC error injection feature may not operate correctly. All Stratix III Devices —
MLAB final timing models were updated post Quartus II Software
version 8.1. Only a subset of designs using MLAB blocks are
affected. See the information in the second paragraph of
“Updated MLAB Final Timing Model (Affecting a Subset of MLAB
Designs)” on page 4.
■ EP3SL110
■ EP3SL150
■ EP3SL340
■ EP3SE80
■ EP3SE110
—
LVDS final timing models were updated post Quartus II Software
version 8.1.
EP3SL340 —
Dynamic phase alignment (DPA) circuitry in Stratix III devices
might get stuck at the initial configured phase or move to the
optimum phase after a longer than expected period of time.
All Stratix III Devices —
Device may fail to power-up for slow V
CCPT
ramp times. All Stratix III Devices —
CRC_ERROR may toggle unexpectedly in user mode without
detecting an actual SEU.
All Stratix III Devices —
M9K and M144K RAM blocks can be put into a locked, inactive
state when driven by a clock with a very narrow pulse (for
example, a glitch).
All Stratix III Devices —
Stratix III devices can fail JTAG configuration in certain positions
of the JTAG chain, depending on the setup conditions.
■ 3SL150 Revision B
and earlier
■ 3SE50/L70/E110/
E260/L340
Revision A
■ 3SL150 Revision C
■ 3SE50/L70/E110/E260/L340
Revision B
■ EP3SL200
■ EP3SL110
■ EP3SL50
■ EP3SE80
Interface timing issues with the LVDS hard macro.
All Stratix III devices All Stratix III devices
The dynamic phase alignment (DPA) lock signal
(
rx_dpa_locked) does not assert on some channels during link
initialization.
All Stratix III devices All Stratix III devices
Page 2 Introduction
Stratix III Device Family Errata Sheet © July 2009 Altera Corporation
The die revision is identified by the third alphanumeric character (Z) from the left
printed on the top side of the device. Figure 1 shows a Stratix III device’s top side lot
code.
The DPA circuit in the EP3SL150 ES devices fails to lock and data
is corrupted at data rates of 150 Mbps to 385 Mbps and data
rates above 622 Mbps.
EP3SL150 ES devices EP3SL150 production devices
Analog-to-digital converter (ADC) for temperature sensing diode
(TSD) no longer supported.
All Stratix III ES and
production devices
—
TSD must have V
CCPT
powered on to operate. ■ Revision A of
EP3SE50,
EP3SL70,
EP3SE110,
EP3SE260,
EP3SL340
■ Revisions A and B
of EP3SL150
devices
Future revisions of the affected
Stratix III devices
Device may enter power-on reset (POR) during reconfiguration
cycle. New information for “Device Reconfiguration Issue” on
page 8.
■ Revision A of
EP3SE50,
EP3SL70,
EP3SE110,
EP3SE260,
EP3SL340
■ Revisions A and B
of EP3SL150
devices
Future revisions of the affected
Stratix III devices
Write speed decrease for M144K blocks in certain modes.
■ Revision A of
EP3SE50,
EP3SL70,
EP3SE110,
EP3SE260,
EP3SL340
■ Revisions A and B
of EP3SL150
devices
Future revisions of the affected
Stratix III devices
MLAB RAM block size changed from 64×10 or 32×20 (640 bits)
to 16×20 (320 bits).
All Stratix III ES and
production devices
—
The TSD is not backwards compatible with Stratix II devices.
EP3SL150 ES devices EP3SL150 production devices
Extra I
CCL
current in user mode. EP3SL150 ES devices EP3SL150 production devices
DPA fails to lock in some cases. EP3SL150 ES devices EP3SL150 production devices
Table 1. Stratix III Family Issues (Part 2 of 2)
Issue Affected Devices Fixed Devices
Figure 1. Stratix III Device Top Side Lot Number
Die Revision
A X
Z
#
# #
#
#
#
#