Disclaimer:
This process guide is provided to users of EZ-IO and fastRise™ to assist in gaining an understanding of these
materials and to quickly establish processes for PCB fabrication. It is assumed that the users will have a technical
understanding and experience in the processes, equipment and standards related to PCB fabrication. The user
will likely need to make adjustments to account for specific requirements and their production processes.
EZ-IO with fastRise™
Processing Guide
November 2015
TABLE OF CONTENTS
GENERAL INFORMATION 4
OVERVIEW 4
EZ-IO 4
FASTRISE™ S PREPREGS 4
STORAGE 6
EZ-IO 6
FASTRISE™ 6
HANDLING 6
EZ-IO LAMINATE 6
FASTRISE™ B-STAGE 7
INNER LAYER PREPARATION 7
ACCLIMATION 7
SCALING 7
LAMINATION 8
QUICK START 8
FLOW PATTERNS / THIEVING 8
PADDING AND CONFORMANCE MATERIALS 9
PRESSURE 9
TEMPERATURE 10
FOIL LAMINATION 12
ADDITIONAL NOTES 13
DRILLING 15
QUICK START 15
DRILL BITS 15
CHIP LOAD 16
CUTTING SPEED 16
DWELL TIME 17
PECK DRILLING 17
HIT COUNT 17
ENTRY / BACKER MATERIALS 19
LASER DRILLING / MICROVIAS 20
HOLE WALL PREPARATION 21
DESMEAR 21
PTFE ACTIVATION 21
PROCESS EXAMPLE 22
PLATING 22
IMAGE, DEVELOP, ETCH, STRIP OF EZ-IO 22
SOLDER MASK 22
SOLDER REFLOW 23
ROUTING / MILLING 23
APPENDIX 24
DRILL CHARTS 24
The following process recommendations are based on testing and production processes at several circuit board facilities. Each facility
will have different product designs, equipment, or methods that will require modifications to these recommendations. For example,
drilling parameters, routing parameters, and artwork compensation can vary dependent on circuit board thickness, design, processes,
and equipment.
Adjustments should be based on the experience of each facility. Please contact your Taconic representative if assistance is required.