2017 Microchip Technology Inc. DS60001524A-page 1
Description
ATSENSE-101/ATSENSE-201(H)/ATSENSE-301(H) are multi-channel analog front end devices which integrate three,
four or seven simultaneously sampled Sigma-Delta A/D converters, a high-precision voltage reference with up to 10
ppm/°C temperature stability (H-versions), a programmable current signal amplification, a temperature sensor and an
SPI interface. When used in data acquisition and energy measurement applications in combination with the Microchip
ATSAM4C device family that features a dedicated Cortex
®
-M4 processor and metrology library and a variety of sensors
including Shunt, CT and Rogowski coils, the ATSENSE-101/ATSENSE-201(H)/ATSENSE-301(H) exceeds ANSI
C12.20-2002 and IEC 62053-22 metering accuracy classes of up to 0.2% over 3000:1 current range.
Features
• Analog Front End
- Single-phase (ATSENSE-101), Dual-phase (ATSENSE-201(H)) or Poly-phase (ATSENSE-301(H)) Energy
Metering Analog Front End Suitable for Microchip MCUs and Metrology Library
- Compliant with Class 0.2 Standards (ANSI C12.20-2002 and IEC 62053-22)
- Three, Four or Seven Sigma-Delta ADC Measurement Channels: One, Two or Three Voltages, Two or Four Cur-
rents, 102 dB Dynamic Range
- Current Channels with Pre-Gain (x1, x2, x4, x8)
- Supports Shunt, Current Transformer and Rogowski Coils
- Dedicated Current Channel for Anti-tamper Measurement
- Integrated SINC Decimation Filters. Output Data Rate: 16 kSps typical
- Integrated 2.8V LDO Regulator to Supply Analog Functions
- 3.0V to 3.6V Operation, Ultra Low Power: < 2.5 mW typical/Channel @ 3.3V
- Specified over two ambient operating temperature ranges : [-40°C ; +85°C] and [-40°C;+105°C]
• Precision Voltage Reference
- Standard 1.2V Output Voltage with Possible External Bypass
- Temperature Drift: 50 ppm typical (ATSENSE-101/ATSENSE-201/ATSENSE-301)
- Temperature Drift: 10 ppm typical (ATSENSE-201H/ATSENSE-301H)
- Factory-measured Temperature Drift and Die Temperature Sensor to Perform Software Correction
- Digital Interface
- 8 MHz Serial Peripheral Interface (SPI) Compatible Mode 1 (8-bit) for ADC Data and AFE Controls
- Interrupt Output Line Signaling ADC End-of-Conversion, Underrun and Overrun
• Package
- 32-lead TQFP, 7 x 7 x 1.4 mm
- 20-lead SOIC, 12.8 x 7.5 x 2.3 mm
Multi-Channel Sigma-Delta Analog Front End
ATSENSE-101/ATSENSE-201(H)/
ATSENSE-301(H)
ATSENSE-101/ATSENSE-201(H)/ATSENSE-301(H)
DS60001524A-page 2 2017 Microchip Technology Inc.
1. Block Diagrams
Figure 1-1: ATSENSE-301(H) Functional Block Diagram
ΣΔ ADC
PGA
ADCI0
<23:0>
IP0
IN0
DIFF
MUX
2:1
ΣΔ ADC
PGA
ΣΔ ADC
VP3
IP3
IN3
ΣΔ ADC
PGA
ΣΔ ADC
VP2
IP2
IN2
ΣΔ ADC
PGA
ΣΔ ADC
IP1
IN1
MCLK
Interrupt
Controller
ITOUT
VP1
VDDA
GNDA
VREF
VDDA
GNDA
VREF
VDDA
GNDA
VREF
VDDA
GNDA
VREF
VDDA
GNDA
VREF
VDDA
GNDA
VREF
VDDA
GNDA
VREF
VTEMP
VTEMP
ADC_CLK
(MCLK/2)
Control
Registers
2.8V
LDO
Voltage
Reference
VDDIN
Die
Temperature
sensor
VREF
GNDD
VDDIO
Power
On Reset
Clock
Generator
FS_CLK
(MCLK/OSR)
ROM
(Calibration Data)
500Ω
VDDA
GNDA
Decimator
SPCK
NPCS
MISO
MOSI
Serial
Peripheral
Interface
ADCI3
<23:0>
ADCV3
<23:0>
Decimator
Decimator
ADCI2
<23:0>
ADCV2
<23:0>
Decimator
Decimator
ADCI1
<23:0>
ADCV1
<23:0>
Decimator
Decimator
VN
VN
VN
GNDREF
ATSENSE-301(H)
VDDT