ATECC608A
Microchip CryptoAuthentication™ Device
Features
Cryptographic Co-Processor with Secure Hardware-based Key Storage:
Protected Storage for up to 16 Keys, Certificates or Data
Hardware Support for Asymmetric Sign, Verify, Key Agreement:
ECDSA: FIPS186-3 Elliptic Curve Digital Signature
ECDH: FIPS SP800-56A Elliptic Curve Diffie-Hellman
NIST Standard P256 Elliptic Curve Support
Hardware Support for Symmetric Algorithms:
SHA-256 & HMAC Hash including off-chip context save/restore
AES-128: Encrypt/Decrypt, Galois Field Multiply for GCM
Networking Key Management Support:
Turnkey PRF/HKDF calculation for TLS 1.2 & 1.3
Ephemeral key generation and key agreement in SRAM
Small message encryption with keys entirely protected
Secure Boot Support:
Full ECDSA code signature validation, optional stored digest/signature
Optional communication key disablement prior to secure boot
Encryption/Authentication for messages to prevent on-board attacks
Internal High-Quality NIST SP 800-90A/B/C Random Number Generator (RNG)
Two High-Endurance Monotonic Counters
Guaranteed Unique 72-bit Serial Number
Two Interface Options Available:
High-speed Single Pin Interface with One GPIO Pin
1 MHz Standard I
2
C Interface
1.8V to 5.5V IO Levels, 2.0V to 5.5V Supply Voltage
<150 nA Sleep Current
8-pad UDFN and 8-lead SOIC Packages
Applications
IoT network endpoint key management & exchange
Encryption for small messages and PII data
Secure Boot and Protected Download
Ecosystem Control, Anti-cloning
© 2017 Microchip Technology Inc.
Datasheet Summary
DS40001977A-page 1
Pin Configuration and Pinouts
Table 1. Pin Configuration
Pin Function
NC No Connect
GND Ground
SDA Serial Data
SCL Serial Clock Input
VCC Power Supply
Figure 1. Pinouts
1
2
3
4
NC
NC
NC
GND
8
7
6
5
V
CC
NC
SCL
SDA
8-pad UDFN
(Top View)
1
2
3
4
NC
NC
NC
GND
8
7
6
5
V
CC
NC
SCL
SDA
8-lead SOIC
(Top View)
3-lead Contact
(Top View)
1
2
3
SDA
GND
V
CC
ATECC608A
© 2017 Microchip Technology Inc.
Datasheet Summary
DS40001977A-page 2