This document is a general product description an d is subject to change without notice. Hynix Semicond uctor does not assume any

responsibility for use of circuits described. No patent licenses are implied.

Rev. 0.8 / Oct. 2007 1

HY5PS12421C(L)FP-xI

HY5PS12821C(L)FP-xI

HY5PS121621C(L)FP-xI

512Mb DDR2 SDRAM

HY5PS12421C(L)FP-xI

HY5PS12821C(L)FP-xI

HY5PS121621C(L)FP-xI

Rev. 0.8 / Oct. 2007 2

1HY5PS12421C(L)FP-xI

1HY5PS12821C(L)FP-xI

1HY5PS121621C(L)FP-xI

Revision History

Rev. History Draft Date

0.1 Preliminary May 2006

0.2 IDD Spec. Changed July 2006

0.3 Removed improper note in ODT spec. July 2006

0.4 Updated IDD3P-S value/OCD Default Characteristics Aug. 2006

0.5 Updated IDD spec for x8 org. on page 16 Feb. 2007

0.6 Removed Y4 Speed bin July 2007

0.7 Updated Timing Patterns (DDR2-800 5/5/5 and 6/6/6) Sep. 2007

0.8 Corrected Typo Oct. 2007