GENERAL APPLICATION NOTE FOR STARTECH UART F AMIL Y

The AN-450 provides additional information to guide

users to design or utilize the STARTECH product line.

This document can also be used for all the

STARTECH UART product lines.

GENERAL INFORMATION

STARTECH offers UART’s with or without FIFO capa-

bilities, and are marked as 45X for non FIFO families

and 55X for FIFO families. All parts with sharing part

numbers are foot print compatible in some extent, like

ST16C450 and ST16C550, ST16C2450 and

ST16C2550, etc.

This section will describe general terms for commonly

used flags and registers.

OVERRUN ERROR:

The flag is set to “1” to warn the user that a serial data

has been received and previous serial data has not

been read from receive holding register. The new

serial data will over write the previous data in the

receive holding register. Note that previous serial data

has been lost and user does not have an access to that

data.

PARITY ERROR:

This flag is set “1” to indicate that received serial data

contains mismatched parity or data bit error in the

received data.

PARITY:

Four common types of parities are used in the

STARTECH Uart families; Odd Parity, Even Parity,

Forced Mark Parity and Forced Space Parity.

ODD PARITY:

Odd Parity is calculated by adding all the “1’s” in a data

stream and adding a parity bit to the total bits, to make

the total count an odd number.

Example -1: A data byte with the following pattern

11010010 will require to add a parity bit of “1” to bring

the total count for “1’s” to an odd number. Based on

this data pattern, serial data with odd parity will be

transmitted as 110100101.

Example -2: A data byte with the following pattern

10011000 will require to add a parity bit of “0” to

maintain the total count of “1’s” to an odd number.

Based on this data pattern, serial data with odd parity

will be transmitted as 100110000.

EVEN PARITY:

Even Parity is calculated by adding all the “1’s” in a

data stream and adding a parity bit to the total bits, to

make the count an even number.

Example -3: A data byte with the following pattern

10000101 will require to add a parity bit of “1” to bring

the total count for “1’s” to an even number. Based on

this data pattern, serial data with even parity will be

transmitted as 100001011.

Example -4: A data byte with the following pattern

00001111 will require to add a parity bit of “0” to

maintain the total count for “1’s” to an even number.

Based on this data pattern, serial data with even

parity, will be transmitted as 000011110.

FORCED SPACE PARITY:

Parity bit on the serial byte is set to “0” regardless of

total number of “1’s” (even or odd counts).

FORCED MARK PARITY:

Parity bit on the serial byte is set to “1” regardless of

total number of “1’s” (even or odd counts).

FRAMING ERROR:

The flag is set to “1” to indicate that received data does

not have correct start or stop bits. This can cause when

the Uarts are set for 8-bits word and receiving a serial

data of 7-bits word or any mismatched data patterns.

BREAK SIGNAL INDICATION:

This flag is set to “1” to warn the user that transmitter

is sending continuous “0” data without stop bit (RX

input is low for more that one word).

TRANSMIT/RECEIVE FIFO:

STARTECH offers 16 byte transmit FIFO and 16 byte

receive FIFO for all its products with 55X part num-

bers. These FIFO’s are static 19 X 16 bit RAM with

control logic to form a ring counter. Initializing the

FIFO will set the write and read pointers to the same

location.

TRANSMIT EMPTY:

This flag is set “1” to indicate that, there is no

character in the transmit holding and transmit shift

7-5

UART APPLICATION NOTES

Rev. 1.0

Printed December 17, 1996

7-6

APPLICATION NOTES

UARTS APPLICATION NOTE

TRANSMIT HOLDING EMPTY:

This flag is set “1” to indicate that, there is one or more

empty locations in the transmit holding register. User

has to check this bit before loading characters in the

transmit holding register. In non FIFO mode, user can

load one character at a time when this flag is set and

16 characters when FIFO mode is utilized.

RECEIVER DATA READY:

This bit is set “1” to indicate that, receiver has one or

more character in the receive holding register. User

has to check this bit prior to read receive holding

can be read. In FIFO mode up to 16 characters can be

read if time bit is set.

RECEIVE TIME-OUT:

This mode is enabled when STARTECH UART is

operating in FIFO mode. Receive time out will not

occur if the receive FIFO is empty. The time out

counter will be reset at the center of each stop bit

received or each time receive holding register is read.

The actual time out value is T ( Time out length in

bits)= 4 X P ( Programmed word length) + 12. To

convert time out value to a character value, user has

to divide this number to its complete word length +

parity ( if used) + number of stop bits and start bit.

Example -7: If user programs the word length = 7, and

no parity and one stop bit, Time out will be:

T = 4 X 7( programmed word length) +12 = 40 bits

Character time = 40 / 9 [ (programmed word length =

7) + (stop bit = 1) + (start bit = 1)] = 4.4 characters.

Example -8: If user programs the word length = 7, with

parity and one stop bit, the time out will be:

T = 4 X 7(programmed word length) + 12 = 40 bits

Character time = 40 / 10 [ (programmed word length

= 7) + (parity = 1) + (stop bit = 1) + (start bit = 1) = 4

characters.

BAUD RATE GENERATOR:

STARTECH provides a 16 bit digital divider to obtain

all necessary baud rates. The 16 bit divider is broken

down in to two 8-bit dividers which will be addressed

as MSB divider (upper 8-bits) and LSB divider (lower

8-bits). To calculate the transmit/receive data rate it

is necessary to know the provided clock rate (fre-

quency) to STARTECH parts. STARTECH utilizes 16

clocks for each transmit bit and 16 clocks to sample

the received data. Note that inorder to access these

dividers, user has to enable the divisor latch access bit

through the Line Control Register.

Bit rate is calculated by:

Dividing decimal number = (Clock rate) / (16 X bit

rate).

To program the digital divider, dividing decimal num-

ber should be converted to hex (base 16) number and

split into two 8-bits sections.

Example -5: To obtain 4800 Hz baud rate, assuming

1.8432 MHz input clock, the dividing decimal value is

( input clock=1843200) / (16 X 4800) = 24

24 decimal = 0018 Hex, this value is translated to MSB

= 00 Hex and LSB = 18 Hex.

BAUD RATE VERSUS BIT RATE:

The baud rate defines the width of each bit regardless

of word, parity and stop bit length. Bit rate, is the rate

of the transmission which each character is transmit-

ted or received. The 2400 baud rate transmission is

translated to 2400 Hz per bit for each character in a

word. With 2400 baud you can transmit between 7 to

12 characters per slot.

PROGRAMMING STEPS:

The AN-450 provides the easy steps to program

STARTECH Uart family. Note that all numbers are in

Hex format not decimal.

Write 80 Hex to LCR (Line Control Register) to enable

baud rate generator divider latch

to set 2400 Hz baud rate:

write 00 Hex to MSB of baud rate generator (address

location 1).

Write 30 Hex to LSB of baud rate generator (address

location 0).

Select you word, parity and stop bit format from

STARTECH Uart data sheet.

to set 8 bits, no parity and one top bit and disable the

divisor access latch

write 03 Hex to LCR (Line Control Register):

if you need to use Uarts with FIFO, select your receive

trigger level from data sheet.

to enable FIFO with 14 character trigger level

write CF Hex to FCR (FIFO Control Register)