EXAR Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com • uarttechsupport@exar.com
DATA COMMUNICATIONS APPLICATION NOTE
DAN134
June 2002
EXAR’S ST16C654 AND XR16C854 COMPARED WITH TI’S TL16C754B
Author: PY
1.0 INTRODUCTION
This application note describes the major difference between Exar’s ST16C654 and XR16C854 with TI’s
TL16C754B. These devices are similar, with a few hardware, bus timing and firmware-related differences.
1.1 H
ARDWARE DIFFERENCES
• The TI TL16C754B and Exar’s ST16C654 and XR16C854 are all available in the 68-pin PLCC package.
The Exar QUARTs are also available in the 64-pin TQFP and 100-pin QFP packages while the TI QUART is
available in a 80-pin QFP package. The Exar and TI QUART are pin-to-pin compatible in the 68-pin PLCC
package.
• The oscillator circuitry is similar, but there are some differences when using a crystal oscillator and when
using an external clock. See Figure 1below for the differences in the oscillator circuitry for a crystal oscillator .
When using an external clock input for frequencies greater than 24 MHz, the Exar QUARTs will require a 2K
pull-up resistor on the XTAL2 pin.
1.2 B
US TIMING DIFFERENCES
• The TL16C754B requires that the -CS pin is asserted first before the -IOR or -IOW pin and the -IOR or -IOW
pin must be de-asserted before the -CS pin is de-asserted. During a read, the Exar DUARTs can have either
the -CS or the -IOR signal asserted first and have either signal be de-asserted first. The signals are wire-
ORed in the Exar DUARTs, therefore the second signal asserted will initiate the read cycle and the first signal
de-asserted terminates the read cycle. The same is true during a write for -CS and -IOW. The flexibility of
the Exar DUARTs timing can be important in DSP, ARM, and MIPS designs.
F
IGURE 1. CRYS TAL OSCILLATOR CIRCUITRY DIFFERENCES
C1
10-30 pF
C2
40-60 pF
Y1
1.8432
MHz
to
16
MHz
R1
1.5 KΩ
R2
1 ΜΩ
XTAL1 XTAL2
C1
22-47 pF
C2
22-47 pF
Y1
1.8432
MHz
to
24
MHz
R1
0-120 Ω
(Optional)
R2
500 ΚΩ − 1 ΜΩ
XTAL1 XTAL2
Exar QUARTTL16C754B
DATA COMMUNICATION S APPLICATION NOTE
DAN134
2
1.3 FIRMWARE DIFFERENCES
1.3.1 Firmware Differences Between the ST16C654 and TL16C754B
The internal registers in the ST16C654 and TL16C754B are similar but with some exceptions:
R = Read-Only, W = Write-Only, R/W = Read/Write
T
ABLE 1: ST16C654 AND TL16C754B REGISTER SET DIFFERENCES
A2:A0 R/W ST16C654 TL16C754B
LCR Bit-7 = 0
100 R/W Modem Control Register (MCR)
• Bit-6 = Infrared Mode Enable
• Bit-2 = Reserved (RI# during Internal Loop-
back)
Modem Control Register (MCR)
• Bit-6 = TCR and TLR Register Enable
• Bit-2 = FIFO Rdy Register Enable
LCR Bit-7 = 0, MCR Bit-6 = 1 (EFR Bit-4 = 1), MCR Bit-4 = 0, MCR Bit-2 = 0
110 R/W N/A Transmission Control Register (TCR)
• RX FIFO Trigger Level Halt and Resume Trans-
mission Le vels (4-60 in multiples of 4)
111 R/W N/A Trigger Level Register (TLR)
• TX and RX Trigger Levels (4-60 in multiples of 4)
LCR Bit-7 = 0, MCR Bit-6 = 0 (EFR Bit-4 = 1), MCR Bit-4 = 0, MCR Bit-2 = 1
111 R N/A FIFO Ready Register (FIFO Rdy)
• Status Bits - TX FIFO level below TX Trigger Level
for channels A-D
• S t atus Bit s - R X FIFO lev el abov e RX T r igger Lev el
for channels A-D
-FSRS pin asserted (100 pin package only)
XXX R FIFO Ready Register (FIFORdy)
• Va lues of RXRDY# A-D and TXRDY# A-D
pins
N/A