This document is a general product descriptio n and is subject to change wit hout noti ce. Hyni x does no t assume an y respon sibilit y for
use of circuits described. No patent licenses are implied.
Rev 1.0 / Dec. 2010 1
256Mb Synchronous DRAM based on 4M x 4Ban k x16 I/O
256M (16Mx16bit) Hynix SDRAM
Memory
Memory Cell Array
- Organized as 4banks of 4,194,304 x 16
Rev 1.0 / Dec. 2010 2
111
Synchronous DRAM Memory 256Mbit
H57V2562GTR Series
H57V2562GTR
Document Title
256Mbit (16M x16) Synchronous DRAM
Revision History
Revision No. History Draft Date Remark
0.1 Preliminary Jun. 2009
1.0 Release (Update PKG dimension raw data) Dec. 2010