Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com
xr ST16C1550/51
2.97V TO 5.5V UART WITH 16-BYTE FIFO
AUGUST 2005 REV. 4.2.1
GENERAL DESCRIPTION
The ST16C1550 and ST16C1551 UARTs (here on
denoted as the ST16C155X) are improved versions
of the SSI 73M1550 and SSI 73M2550 UART with
higher operating speed and lower access time. The
ST16C155X provides enhanced UART functions with
16 byte FIFOs, a modem control interface,
independent programmable baud rate generators
with clock rates up to 1.5 Mbps. Onboard status
registers provide the user with error indications and
operational status. System interrupt and modem
control features may be tailored by external software
to meet specific user requirements. An internal
loopback capability allows onboard diagnostics. The
baud rate generator can be configured for either
crystal or external clock input with the exception of
the 28 pin ST16C1551 package (where an external
clock must be provided). Each package type, with the
exception of the 28 pin ST16C155X, provides a
buffered reset output that can be controlled through
user software. DMA monitor signals TXRDY/RXRDY
are not available at the ST16C155X I/O pins but
these signals are accessible through ISR register bits
4-5. Except as listed above, all package versions
have the same features.
The ST16C155X is not
compatible with the industry standard 16550 and will
not work with the standard serial port driver in MS
Windows (see pages 16-17 for details). For an MS
Windows compatible UART, see the ST16C550.
FEATURES
Pin and functionally compatible to SSI 73M1550/
2550
16 byte Transmit FIFO
16 byte Receive FIFO with error flags
4 selectable Receive FIFO interrupt trigger levels
Modem Control Signals (CTS#, RTS#, DSR#,
DTR#, RI#, CD#)
Programmable character lengths (5, 6, 7, 8) with
even, odd or no parity
Crystal or external clock input (except 28 pin
ST16C1551, external clock only)
1.5 Mbps Transmit/Receive operation (24 MHz)
with programmable clock control
Power Down Mode (50 uA at 3.3 V, 200 uA at 5 V)
Software controllable reset output
2.97 to 5.5 Volt operation
APPLICATIONS
Battery Operated Electronics
Internet Appliances
Handheld Terminal
Personal Digital Assistants
Cellular Phones DataPort
FIGURE 1. BLOCK DIAGRAM
XTAL1/CLK
XTAL2
Crystal Osc/Buffer
DTR#, RTS#
DSR#, CTS#,
CD#, RI#
Data Bus
Interface
16 Byte TX FIFO
Baud Rate Generator
Transmitter
UART
Configuration
Regs
IOR#
16 Byte RX FIFO
Receiver
Modem Control Signals
TX
RX
INT
A2:A0
D7:D0
CS#
IOW#
RESET
RST
ST16C1550/51 xr
2.97V TO 5.5V UART WITH 16-BYTE FIFO REV. 4.2.1
2
FIGURE 2. ST16C1550 PINOUTS
28-PLCC PACKAGES
48-TQFP PACKAGE
48
47
46
45
44
43
42
41
40
39
38
37
1
2
3
4
5
6
7
8
9
10
11
12
36
35
34
33
32
31
30
29
28
27
26
25
13
14
15
16
17
18
19
20
21
22
23
24
N.C.
N.C.
D4
D5
D6
D7
RX
TX
CS#
N.C.
N.C.
N.C.
N.C.
N.C.
CTS#
RESET
DTR#
RTS#
A0
N.C.
A1
A2
N.C.
N.C.
N.C.
D3
D2
D1
N.C.
D0
N.C.
VCC
CD#
DSR#
N.C.
N.C.
N.C.
N.C.
XTAL1
XTAL2
IOW#
N.C.
GND
IOR#
RI#
RST
INT
N.C.
ST16C1550CQ48
4
3
2
1
28
27
26
5
6
7
8
9
10
11
25
24
23
22
21
20
19
12
13
14
15
16
17
18
D4
D5
D6
D7
RX
TX
CS#
CTS#
RESET
DTR#
RTS#
A0
A1
A2
D3
D2
D1
D0
VCC
CD#
DSR#
XTAL1
XTAL2
IOW#
GND
IOR#
RI#
INT
ST16C1550CJ28
NOTE: PINOUTS NOT TO SCALE.
ACTUAL SIZE OF TQFP PACKAGE
IS SMALLER THAN PLCC PACKAGE.