Features
With built-in bias resistors
Simplify circuit design
Reduce a quantity of parts and
manufacturing process
Package
Circuit diagram
SOT-523(1:IN 2:GND 3:OUT)
SDTC123JKF
NPN Digital Transistor
１
CAUTION: These devices are sensitive to electros
tatic discharge;
follow
proper
IC Handling Procedures.
(
and designs)
ar
e
regis
tered trademarks
of
SU
M Semiconductor
Corporation.
Copyright
SUM
Semiconductor
Corporation.
All
Rights
Reserved.
All other
trademarks
mentioned
are
the property of
their respective owners.
Absolute maximum ratings (Ta=25℃ unless otherwise noted)
Parameter Symbol Value
Unit
Supply Voltage V
CC
50 V
Input Voltage V
IN
-5~+12 V
Output Current I
O
100 mA
Power Dissipation P
D
150 mW
Junction Temperature T
J
150 ℃
Storage Temperature Range T
STG
-55 ~ +150 ℃
Electrical characteristics (T
A
=25
o
C, unless otherwise noted)
Parameter Symbol Condition Min. Typ. Max. Unit
DC Current Gain
h
FE
V
CE
= 5V,I
C
= 10mA
80
Collector Cut-off Current
I
CBO
V
CB
= 50 V, I
E
= 0A
0.5 uA
Emitter Cut-off Current
I
EBO
V
EB
= 5 V, I
C
= 0A
3.6 uA
Collector Emitter Saturation
Voltage
V
CE(sat)
I
C
= 5mA, I
B
= 0.25mA
0.3 V
Input on Voltage
V
i(on)
V
CE
= 0.3 V, I
C
= 5 mA
1.1 V
Input off Voltage
V
i(off)
V
CE
= 5 V, I
C
= 100uA
0.5 V
Current Gain Bandwidth
Product
f
T
V
CE
= 10 V, -I
E
= 5 mA, f = 100 MHz
250 MHz
Input Resistance R1 1.54 2.2 2.86 KΩ
stance Ratio R2/R1 17 21 26
SDTC123JKF
2
CAUTION: These devices are sensitive to electros
tatic discharge;
follow
proper
IC Handling Procedures.
(
and designs)
ar
e
regis
tered trademarks
of
SU
M Semiconductor
Corporation.
Copyright
SUM
Semiconductor
Corporation.
All
Rights
Reserved.
All other
trademarks
mentioned
are
the property of
their respective owners.