LP1111-02 Nov.-2017 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 1 of 9
Preliminary Datasheet LP1111
Dual Bootstrapped, 12V MOSFET Driver with Output Enable
General Description
The LP1111 is a single phase 12V MOSFET gate
driver optimized to drive the gates of both high-side
and low-side power MOSFETs in a synchronous buck
converter.
With a wide operating voltage range, high or low side
MOSFET gate drive voltage can be optimized for the
best efficiency. Internal adaptive non-overlap circuitry
further reduces switching losses by preventing
simultaneous conduction of both MOSFETs.
The floating top driver design can accommodate VBST
voltages as high as 35V, with transient voltages as
high as 40V. Both gate outputs can be driven low by
applying a low logic level to the enable(EN) pin. An
undervoltage lockout function ensures that both driver
outputs are low when the supply voltage is low, and a
Thermal Shutdown function provides the IC with
over-temperature protection.
Order Information
LP1111 □□□
F: Halogen Free & Pb Free
Package Type
SO: SOP8
QV:TDFN8(2x2mm)
Features
All-In-One Synchronous Buck Driver
Bootstrapped High-Side Drive
One PWM Signal Generates Both Drives
Anti-cross Conduction Protection Circuitry
Available in SOP8 & TDFN8 Package
Applications
Multiphase Desktop CPU Supplies
Single-supply Synchronous Buck Converters
Typical Application Circuit
LP1111
VCC
BST
DRVH
SWN
DRVL
PGND
D1
EN
PWM
VIN
VCC
L1
VOUT
EN
PWM
C1
C2
C3
C4
M1
M2
Marking Information
Device
Marking
Package
Shipping
LP1111SOF
LPS
LP1111
YWX
SOP8
4K/Reel
LP1111QVF
LPS
LP1111
YWX
TDFN8
2x2mm
5K/Reel
Y:Production year W:Production period X:Production batch
LP1111-02 Nov.-2017 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 2 of 9
Preliminary Datasheet LP1111
Functional Pin Description
Package Type
SOP8/TDFN8
EN
VCC
1
2
3
4 5
6
7
8
PWM
BST
DRVH
SWN
PGND
DRVL
BST
PWM
EN
VCC
DRVH
DRVL
PGND
SWN
1
2
3
4
5
6
7
8
Pin
Name
Description
1
BST
Upper MOSFET Floating Bootstrap Supply. A capacitor connected between BST and
SW pins holds this bootstrap voltage for the high-side MOSFET as it is switched. The
recommended capacitor value is between 100nF and 1.0μF. An external diode is
required with the LP1111.
2
PWM
Logic-Level Input. This pin has primary control of the drive outputs.
3
EN
Active high output enable. When low, normal operation is disabled forcing DRVH and
DRVL low.
4
VCC
Input Supply. A 1.0μF ceramic capacitor should be connected from this pin to PGND.
5
DRVL
Output drive for the lower MOSFET.
6
PGND
Power Ground. Should be closely connected to the source of the lower MOSFET.
7
SWN
Switch Node. Connect to the source of the upper MOSFET.
8
DRVH
Output drive for the upper MOSFET.