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Rev.A.1
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TPL51200 Series
3-A Sink and Source DDR Termination Regulator
Features
V
IN
Voltage: Support 2.5-V, 3.3-V and 5-V Power Rails
V
LDOIN
Voltage Range: 1.1 V to 3.5 V
Flexible Input Voltage Tracking Directly from REFIN or
Through External Resistor Divider
3-A Sink and Source Current Capability for DDR
Termination
Integrated Power MOSFETs
Output Remote Sensing
Fast Load-Transient Response
Open-Drain Power Good to Monitor OUT Regulation
Built in Soft-Start and UVLO, Current Limit and Thermal
Shutdown Protection
Support DDR, DDR2, DDR3, DDR3L, Low Power DDR3
and DDR4 VTT Applications
Operating Temperature Range: 40°C to +125°C
Small Package with 3×3 DFN-10
Pb−Free and are RoHS Compliant
Applications
Memory VTT Regulator for DDR, DDR2, DDR3, DDR3L,
Low Power DDR3 and DDR4
Notebooks, Desktops, and Workstations
Servers, Networking equipment and Datacenters
Telecom and Base Station
Description
With the development of main processors in PCs and servers,
more and more source double-data-rate (DDR) memories are
required in the mainboard, where the input voltage becomes
lower and lower, and space limitation becomes higher and
higher.
The TPL51200 series devices are 3-A sink and source DDR
termination regulators specifically designed for the DDR
applications with heavy space limitation. The TPL51200 series
devices implement a fast load-transient response and only
requires a minimum output capacitance of 20 μF.
The TPL51200 series devices support a remote-sensing
function and all power requirements for DDR VTT bus
termination. In addition, the TPL51200 series devices provide
an open-drain PG signal for VTT regulation indication and an
EN signal that can be used to discharge VTT for DDR
applications.
The TPL51200 series devices are available in the thermally
efficient 10-pin 3×3 DFN package with thermal pad, and support
the operating temperature range from 40°C to +125°C.
Typical Application Schematic
TPL51200
REFIN
1 nF
10 kΩ
10 kΩ
1
2 LDOIN
0.1 μF10 μF
3 OUT
10 μF
GND
10 μF10 μF
4 PGND
5 SNS
10IN
100 kΩ
9PG
8GND
7EN
6REFOUT
0.1 μF
4.7 μF
VDDQ = 1.2 V
V
LDOIN
= VDDQ = 1.2 V
VTT = 0.6 V
V
IN
= 3.3 V
PG Signal to I/O
Enable Signal
VTTREF = 0.6 V
www.3peak.com
Rev.A.1
2 / 18
TPL51200 Series
3-A Sink and Source DDR Termination Regulator
Product Family Table
Part Number
Output Current
Package
Transport Media, Quantity
MSL
Marking information
TPL51200
3 A
3×3 DFN-10
4,000
MSL3
L200