ES_MM32A0140_V0.5_EN
Rev 0.5 www.mm32mcu.com 2
Contents
1 About this document ..................................................................................................... 3
2 Overview ....................................................................................................................... 4
3 Issues and solutions ..................................................................................................... 5
3.1 DMA .................................................................................................................. 5
3.1.1 Incorrect data reading may occur when multiple DMA channels are
accessed at the same time ................................................................................... 5
3.2 ADC .................................................................................................................. 5
3.2.1 ADC trigger doesn’t work properly when selecting trigger source CC4
|| CC5 5
3.3 HSI .................................................................................................................... 6
3.3.1 When the system clock is divided by HSI 8MHz, the Stop or Deep
Stop mode cannot be woken up by EXTI ............................................................. 6
3.4 Flash ................................................................................................................. 6
3.4.1 Reset during Flash erasing or programming may cause chip abnormal
6
3.4.2 Code executed in SRAM cannot perform Page Erase, Program or
Read operation to the Main Flash when the read protection is enabled .............. 6
3.4.3 UID cannot be read through SWD when read protection is enabled ... 6
4 Revision history ............................................................................................................ 8