High frequency DC:DC power conversion:
The influence of package parasitics
Mark Pavier*, Andrew Sawle*, Arthur Woodworth*, Ralph Monteiro**, Jason Chiu**, Carl Blake**
* International Rectifier, Holland Road, Hurst Green, Surrey, RH8 9BB, UK
** International Rectifier, 233 Kansas St., El Segundo, CA, 90245 USA
As presented at APEC 03
Abstract
Operating power MOSFET devices at frequencies over
1MHz will pose significant challenges to established
power electronic packages such as the D2-Pak and
wirebonded SO-8 devices. In this paper the high
frequency parasitic impedances of a range of power
electronic packages are presented. Results show that a
source mounted power package technology based upon
a copper clip type assembly has considerably lower
parasitic impedance compared to conventional power
packaging at frequencies in the range of 500KHz to over
1MHz. The resistance of conventional packages
recorded over this range of frequencies increases
significantly as the frequency approaches 1Mhz. This is
expected to be a result of skin effect related phenomena
occurring in wire bonds and package leads. Package
impedance data up to frequencies of 5MHz will be
presented for a range of packages along with efficiency
data recorded from devices operating in multi-phase
buck converter circuits.
I. INTRODUCTION
The level of integration in desktop and portable PC
microprocessors has increased over the past decade in
line with Moore’s law [1]. During the same time period
clock frequencies have also increased from a few tens of
MHz to over 2 GHz [1]. As a consequence of these two
factors the current requirements of microprocessors have
also significantly increased. Power is usually supplied to
a microprocessor from a fixed 12V supply rail using a
point of load converter or voltage regulator module
(VRM). In order to supply the fast transient current
response required by the processor, converter
frequencies have been increased to over 1MHz and in
many cases multiphase designs have been adopted.
Operating Power MOSFET devices at over 1MHz will
pose significant challenges to established power
electronic packages such as the D2-PAK and the
wirebonded SO-8 devices. In this paper the high
frequency parasitic impedances of D2-Pak, D-Pak, MLP,
SO-8 and a proprietary source mounted package,
DirectFET
TM
, are presented. These packages are shown
in figure 1. Parasitic inductance and resistance are
studied over a frequency range of 500KHz to 5MHz.
Finally, in circuit efficiency data and switching waveforms
of near identical silicon operating in SO-8 and
DirectFET
TM
packages in high frequency 2 phase VRM
circuits are presented in order to highlight the effects of
power package parasitics upon VRM performance.
Figure 1. Packages investigated. Going from left to right:
Top row: DirectFET, D2-Pak and D-Pak
Bottom row: SO-8 and MLP packages
II. PACKAGE ASSEMBLY
Packages were assembled with the silicon die removed
(e.g. die free). In the case of D-Pak, D2-Pak, MLP and
SO-8 devices this involved placing wirebonds on the
silicon bond pad of the device leadframe. Care was
taken to ensure that the wirebonds occupied the same x-
y coordinates on the die bond pads as they would
normally occupy in the packages containing silicon. Die
free samples of the source-mounted package
(DirectFET
TM
) were assembled by replacing the silicon
die with a stamped copper die of equivalent dimensions
to the original silicon. This was required in order that the
underside of the DirectFET
TM
clip could be brought into
contact with the source electrode printed circuit board
pads.
Devices were assembled onto test cards fabricated from
double-sided FR4 with 2 Ounce copper tracking.
Sn62Pb36Ag2 near eutectic no clean solder (Multicore
SN62MP100AGS90) was screen-printed onto test cards
prior to component pick and place. After component
placement test cards were re-flowed using a standard
JEDEC profile and visually inspected for defects.
III. TEST PROCEDURE
Resistance and inductance measurements were
performed using an Agilent/HP4285A high precision LCR
meter. A custom designed test fixture was used to
interface the device test cards to the LCR output current
source/voltage sense (Kelvin) terminals. The test
procedure was as follows:
1) Insert ‘open circuit test card’ into test fixture &
perform OPEN circuit correction
2) Insert ‘short circuit test card’ into test fixture &
measure SHORT circuit R and L values
3) Insert device test card into test fixture and
measure LOAD R and L
Note that the above procedure was carried out for each
device at each frequency tested. The HP4285A was
operated in the correction mode for improved low
resistance repeatability. Figures 2(a), (b) and (c) show
the OPEN circuit test card, short circuit test card, and
device test card respectively, for the DirectFET
TM
package. It should be noted that in order to obtain low
resistance short circuit measurements the Kelvin drain
and source via holes were located as close together as
possible. The resultant short circuit obtained between
Kelvin vias was calculated to be in the region of 40
µOhms. Note that the track impedances from the Kevin
vias to the device under test are included in all of the
experimental results shown below. The results
presented below are therefore for devices mounted on a
board, not discrete devices. Figure 3 shows the test card
designs for each of the packages investigated. The
circle superimposed onto each of the images indicates
the location of each of the sense vias. In each case
these vias were located as close as possible to edge of
the package, and where possible underneath the
package leads.
Figures 2 from left to right
(a) OPEN, (b) SHORT and (c) DEVICE UNDER TEST Cards.
Figures 3 from left to right
D2-Pak, D-Pak, SO-8, MLP and DirectFET
TM
test cards.
Notes circles highlight sense via location.
IV. PACKAGE RESISTANCE CHARACTERISTICS
Figure 4 shows the board mounted package resistance
versus frequency for each of the packages characterised.
The DirectFET
TM
package shows the lowest board
mounted package resistance from DC up to 5MHz. At
frequencies of 1MHz and above it should be noted that
surface mount devices based upon conventional leaded
packages, such as the D2-Pak and D-Pak, show very
significant increases in package resistance in relation to
values measured at DC.
0.00
1.00
2.00
3.00
4.00
5.00
6.00
0 1 2 3 4 5
Frequency [MHz]
Board mounted package resistance [mOhm]
DFET
MLP
SO-8
D-Pak
D2-Pak
Figure 4. Measured package resistance versus frequency
With reference to figure 4 each mounted package
exhibits a characteristic increase in resistance with
Short circuit
G D S
Kelvin vias
circuit