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Preliminary
SLG7RN45356
RZ/G2L SMARC POWER_RESET
SLG7RN45356_DS_r012
SLG7RN45356_GP_r001
Rev 0.12
Revised
July 12, 2023
General Description
Features
Output Summary
3 Outputs - Open Drain NMOS 2X
4 Outputs - Push Pull 1X
2 Outputs - Push Pull 2X
Pin Configuration
Pin name
Pin #
Pin name
Pin #
Pin name
1 VDD 11 GND
2 SW_ET0_EN# 12 ET1_LED2
3 RESET_IN# 13 RZ_ET1_LINKSTA
4 RESET_18#_IN 14 VDD2
5 RESET_18#_OD 15 ET0_LED2
6 PMIC_nRESET 16 RZ_ET0_LINKSTA
7 RZ_PRST# 17 CARRIER_PWR_ON
8 PMIC_PGOOD 18 NC
9 GBE0_LINK_1000# 19 RESET_OUT#
10 GBE1_LINK_1000# 20 ET0_RESET#
• Low Power Consumption
• Pb - Free / RoHS Compliant
• Halogen - Free
• STQFN - 20 Package
Renesas SLG7RN45356 is a low power and small
form device. The SoC is housed in a 2mm x 3mm
STQFN package which is optimal for using with
small devices.
Preliminary
Page 2 of 10
RZ/G2L SMARC POWER_RESET
SLG7RN45356_DS_r012
SLG7RN45356
Block Diagram