eGaN® FET DATASHEET
EPC23103
EPC – POWER CONVERSION TECHNOLOGY LEADER | EPC-CO.COM | ©2023 | | 1
The ePower
TM
Stage IC Product Family integrates input logic interface, level shifting, bootstrap charging
and gate drive buer circuits along with eGaN output FETs. Integration is implemented using EPC’s
proprietary GaN IC technology. The end result is a Power Stage IC that translates logic level input to
high voltage and high current power output that is smaller in size, easier to manufacture, simpler to
design and more ecient to operate.
EFFICIENT POWER CONVERSION
HAL
Key Parameters
PARAMETER VALUE UNIT
Power Stage Load Current (1 MHz) 25
A
Pulsed current (25°C, T
pulse
= 300 μs) 109
Operating PWM Frequency (Minimum) 5 kHz
Operating PWM Frequency (Maximum) 3 MHz
Absolute Maximum Input Voltage 100
V
Operating Input Voltage Range 80
Nominal Bias Supply Voltage 5
Output Current and PWM Frequency Ratings are specied at ambient temperature of 25°C. See Application Information
section for rating methodologies, test conditions, thermal management techniques and thermal derating curves.
All exposed pads feature wettable anks that allow side wall solder inspection. High voltage and low voltage pads
are separated by 0.6mm spacing to meet IPC rules.
Buck Converter, V
IN
= 48 V, V
OUT
= 12 V, Deadtime = 10 ns, L = 2.2 µH, DCR = 700 µΩ, Top Side Heatsink
attached, Airow = 400 LFM, T
A
= 25°C, using EPC90151 Evaluation Board.
EPC23103
Figure 1: Performance Curves
500 kHz
1 MHz
2 MHz
Efficiency (%)
Total Power Loss (W)
I
LOAD
(A)
98
97
96
95
94
93
92
91
90
32
28
24
20
16
12
8
4
0
0 5 10 15 20 25 30 35
EPC23103 – ePower™ Stage IC
V
IN
, 100 V
I
Load
, 25 A
PRELIMINARY
Applications
• Buck, Boost, Buck-Boost Converters
• Half-Bridge, Full Bridge LLC Converters
• Motor Drive Inverter
• Class D Audio Amplier
Features
• Integrated high side and low side eGaN® FET with
internal gate driver and level shifter
• 5 V external bias supply
• 3.3 V or 5 V CMOS input logic levels
• Independent high side and low side control inputs
• Logic lockout commands both FETs o when inputs
are both high at same time
• External resistors to tune SW switching times and
over-voltage spikes above rail and below ground
• Robust level shifter operating for hard and soft
switching conditions
• False trigger immunity from fast switching transients
• Synchronous charging for high side bootstrap supply
• Disable input engages low quiescent current mode
from V
DRV
supply
• Power on reset for low side V
DD
supply
• Power on reset for high side V
Boot
supply
• Active gate pull-down for HS FET and LS FET with loss
of V
DRV
supply
• Thermally enhanced QFN
package with exposed top
for low thermal resistance
from junction to top-side
heatsink
Device Information
PART NUMBER Rated R
DS(on)
for HS and LS FETs at 25 °C QFN Package Size (mm)
EPC23103
7.6 mΩ + 7.6 mΩ 3.5 x 5
EPC23103 ePower
TM
Stage IC
Package size: 3.5 x 5 mm
https://l.ead.me/EPC23103