Application Note
R01AN5345EJ0110 Rev.1.10 Page
1
of 146
May.20.22
RX671 Group, RX65N/RX651 Group
Differences Between the RX671 Group and the RX65N Group
Summary
This application note is intended as a reference to points of difference between the peripheral functions, I/O
registers, and pin functions of the RX671 Group and RX65N Group, as well as a guide to key points to
consider when migrating between the two groups.
Unless specifically otherwise noted, the information in this application note applies to the 145-pin package
version of the RX671 Group and the 177-pin package version of the RX65N Group as the maximum
specifications. To confirm details of differences in the specifications of the electrical characteristics, usage
notes, and setting procedures, refer to the User’s Manual: Hardware of the products in question.
Target Devices
RX671 Group and RX65N Group
RX671 Group, RX65N/RX651 Group Differences Between the RX671 Group and the RX65N Group
R01AN5345EJ0110 Rev.1.10 Page
2
of 146
May.20.22
Contents
1. Comparison of Built-In Functions of RX671 Group and RX65N Group..................................... 4
2. Comparative Overview of Specifications .................................................................................. 6
2.1 CPU ......................................................................................................................................................... 6
2.2 Address Space ........................................................................................................................................ 8
2.3 Option-Setting Memory ......................................................................................................................... 11
2.4 Clock Generation Circuit ....................................................................................................................... 12
2.5 Low Power Consumption ...................................................................................................................... 16
2.6 Battery Backup Function ....................................................................................................................... 20
2.7 Register Write Protection Function ........................................................................................................ 21
2.8 Exception Handling................................................................................................................................ 22
2.9 Interrupt Controller................................................................................................................................. 23
2.10 Buses ..................................................................................................................................................... 27
2.11 DMA Controller ...................................................................................................................................... 31
2.12 Event Link Controller ............................................................................................................................. 33
2.13 I/O Ports ................................................................................................................................................ 38
2.14 Multi-Function Pin Controller ................................................................................................................. 43
2.15 Port Output Enable 3 ............................................................................................................................. 91
2.16 8-Bit Timer ............................................................................................................................................. 92
2.17 USB 2.0 Host/Function Module ............................................................................................................. 93
2.18 Serial Communications Interface .......................................................................................................... 95
2.19 Serial Peripheral Interface ................................................................................................................... 100
2.20 Quad Serial Peripheral Interface/Quad SPI Memory Interface ........................................................... 103
2.21 Boundary Scan .................................................................................................................................... 105
2.22 12-Bit A/D Converter ........................................................................................................................... 106
2.23 Data Operation Circuit ......................................................................................................................... 111
2.24 RAM ..................................................................................................................................................... 113
2.25 Standby RAM ...................................................................................................................................... 114
2.26 Flash Memory ...................................................................................................................................... 115
2.27 Packages ............................................................................................................................................. 119
3. Comparison of Pin Functions ............................................................................................... 120
3.1 144-Pin LFQFP Package .................................................................................................................... 120
3.2 100-Pin TFLGA Package .................................................................................................................... 127
3.3 100-Pin LFQFP Package .................................................................................................................... 132
3.4 64-Pin TFBGA Package ...................................................................................................................... 137
3.5 64-Pin LFQFP Package ...................................................................................................................... 140
4. Notes on Migration............................................................................................................... 143
4.1 Notes on Functional Design ................................................................................................................ 143
4.1.1 Running RAM Self-Diagnostics on Register Save Banks ................................................................. 143