Application Notes
R01AN5377EJ0200 Rev.02.00 Page
1
of 39
Nov.10.21
RX23E-A Group
Analog Front End Typical Characteristics
Summary
This document describes typical analog characteristics of 24bit Δ-Σ A/D converter (DSAD) and Analog Front
End (AFE) integrated in RX23E-A.
Measurement conditions are described as below, unless otherwise specified.
AVCC0=5V, Ta=25°C, External VREF=2.5V, Normal mode, OPCR.DSADLVM bit=0 (*1)
See below for the meaning of abbreviations contained in this document.
Gain=1(DSAD) : PGA disabled / Buffer disabled
Gain=1(BUF) : PGA disabled / Buffer enabled
Gain=1(PGA) : PGA enabled / Buffer enabled
PRB : Positive Reference Buffer
NRB : Negative Reference Buffer
Target Device
RX23E-A
*1 OPCR.DSADLVM bit selects the operating voltage for Δ-ΣA/D. When the AVCC0 voltage is lower than 3.6 V, set it
to 1. To use Δ-ΣA/D with high precision, set the AVCC0 voltage to 3.6 V or higher, and set this bit to 0.
VCC
VSS
VCL
MD
RES#
XTAL/P37
EXTAL/P36
GPIO
AIN8/AN002
/VREFL0
Low side power switch
Excitation
current
source
BGR
VBIAS
AVCC0
AVSS0
AIN0
AIN1
AIN2
AIN3
AIN4/REF1N
AIN5/REF1P
AIN6/AN000
AIN7/AN001
LSW
AIN9/AN003
/VREFH0
AIN11/AN005
REFOUT
REF0N
REF0P
12bit
SAR ADC
MUX
Digital
Filter
(SINC4)
24bit
DSADC
Offset/
Gain
calibration
PGA
Digital
Filter
(SINC4)
24bit
DSADC
Offset/
Gain
calibration
PGA
AVSS0
AVSS0
REF1N
REF1P
AVCC0
REFOUT
REF2N
REF2P
VREFL
VREFH
AVSS0
AVCC0
AVSS0
AVSS0
REF1N
REF1P
AVCC0
Memory
RXv2 32MHz
FPU
Flash memory
128KB256KB
RAM
16K32KB
E2 Data Flash
8KB
Serial I/F
Bus control
DMAx4 DTC
Clock
HOCO (32MHz)
Main-clock
(120MHz)
LOCO (4MHz)
ILOCO (15kHz)
PLL
(up to 32MHz)
Timer
Other function
Safety function
IWDT
CAC
AD check
DOC
POE2
CRC
SCIx4 RIIC
RSPI CAN
MTU2 x6 TMR x4
CMT x2
LPT
POR LVD
ELC
MPC
Temp
Sensor
RX23E-A Group Analog Front End Typical Characteristics
R01AN5377EJ0200 Rev.02.00 Page
2
of 39
Nov.10.21
Contents
1. RX23E-A Analog Front End Features ...................................................................................... 4
2. 24bit Delta-Sigma A/D Converter ............................................................................................. 5
2.1 Noise histogram, Time domain waveform ............................................................................................. 5
2.2 Integral nonlinearity error (INL) ............................................................................................................. 7
2.3 Offset error histogram ........................................................................................................................... 9
2.4 Offset error temperature drift ............................................................................................................... 11
2.5 Offset error - Input common mode voltage ......................................................................................... 12
2.6 Gain error histogram ........................................................................................................................... 14
2.7 Gain error temperature drift ................................................................................................................. 16
2.8 RMS noise Input differential voltage ................................................................................................ 17
2.9 RMS noise VREF dependence histogram .......................................................................................... 18
2.10 RMS noise Date rate ........................................................................................................................ 21
2.11 Effective resolutionDate rate ............................................................................................................ 22
2.12 Noise table (Normal mode) ................................................................................................................. 23
2.13 Noise table (Low power mode) ............................................................................................................ 24
2.14 Common Mode Rejection Ratio (CMRR) ............................................................................................ 25
3. Voltage Reference (VREF) .................................................................................................... 26
3.1 Initial accuracy, Temperature drift, Load regulation ............................................................................ 26
4. Excitation Current Source (IEXC) .......................................................................................... 27
4.1 Initial accuracy, Current matching ....................................................................................................... 27
4.2 Temperature drift ................................................................................................................................. 28
4.3 Drift matching ...................................................................................................................................... 29
4.4 Load regulation .................................................................................................................................... 30
5. Temperature sensor (TEMPS) ............................................................................................... 30
5.1 Temperature error ............................................................................................................................... 30
6. 24-bit Delta-Sigma A/D Converter Analog Input ..................................................................... 31
6.1 Input current temperature dependence ............................................................................................... 31
6.2 Input bias current Input voltage ........................................................................................................ 32
6.3 Input offset current - Input voltage....................................................................................................... 33
7. External Reference Input ....................................................................................................... 34
7.1 Input current temperature dependence ............................................................................................... 34
7.2 Input current Input voltage ................................................................................................................ 34
8. Operating Current .................................................................................................................. 35
8.1 24-bit Delta-Sigma A/D converter operating current AVCC0 ........................................................... 35
8.2 24-bit Delta-Sigma A/D converter operating current temperature dependence .................................. 35
8.3 Buffer operating current temperature dependence ............................................................................. 36
8.4 Voltage reference (VREF), Temperature sensor (TEMPS), Bias voltage generator (VBIAS),
Excitation current source (IEXC) ......................................................................................................... 36